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486 Motherboard with abysmal ISA performance

maxtherabbit

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I've got a pretty neat 486 board here. Built in 1991, it uses a Zymos POACH chipset (designed for 286 systems) grafted to a 486 processor and cache with the help of a bunch of PAL/GALs and discreet logic.

My issue with it is that despite using an ET4000AX card which will manage >4MB/sec on a 286 system, I'm only able to get about ~2MB/sec throughput to video memory. This cripples an otherwise awesome board for gaming performance. So I am on a quest to improve the situation.

The POACH, being a 286 chipset, is designed to run at wire speed and does not offer any type of bus wait states or recovery cycles. Therefore, I can assume that the bus slowness is a factor of something in the glue logic. So far after conducting a brief survey of the components, the only thing that stands out at me is this: a Dallas DS1000-50 silicon delay line. I can't really think of another good reason for this to be present, so I'm considering removing it and shorting the input to the tap. Thoughts?

I've already started a identical thread on vogons, so I'll go ahead and address the first few points that came up over there.

1) Does the POACH have any hidden configuration options? No. As far as I can tell from the datasheet, it has no configuration registers whatsoever.
2) Does the BIOS have any hidden configuration options? Doubtful. I'll attach a dump for the curious, but it's a bog standard pre-color AMIBIOS with extra options only for shadow on/off and cache on/off. These options must be physically implemented in one of the many PAL/GALs, so there is indeed the possibility that more configuration bits exist in register(s) exposed to an IO port.
3) What speed is the ISA bus running at? It has its own oscillator of 16MHz, which is divided by 2 in the POACH. I've verified the ISA slots get a steady 8MHz on my scope.
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IIRC ET4000AX has 8-bit autosense. Possibly that is not working correctly.
 
IIRC ET4000AX has 8-bit autosense. Possibly that is not working correctly.
All ISA transactions are bottlenecked. I've tried multiple different video cards. The board is 100% inserting I/O recovery cycles.

I did find it on Ultimate Retro, but the listing provided no usable information.
https://www.ultimateretro.net/en/motherboards/6702

I'm starting to get curious about the unpopulated DIP-16 footprint under the memory size DIP switch. Perhaps this was for a bank of 8 DIP switches to control other options?
 
Did you find a datasheet for the Zymos POACH or the Intel POACH? I would be interested in the Zymos version. From what I have read, POACH based chipsets are not particularly fast.

I can't really think of another good reason for this to be present, so I'm considering removing it and shorting the input to the tap. Thoughts?
I am guessing memory timing. Perhaps RAS-wait-CAS. I have a proprietary memory card that does the memory like this. CPU just issues a signal on the RAS and the CAS is done by the card. Any idea what it connects to?

I don't see anything that screams cache controller on that motherboard. I know of at least one implementation of a discrete logic cache controller, so perhaps? Any SRAM about?, is that some at the front? Wondered if the lack of L2 cache and that POACH means the CPU is always getting slow access to the ISA bus. Kinda like it is constantly out of sync, and hence poor performance.

Dunno about that DIP 16. Could be anything. If it is for a switch block, think it is unlikely they would socket a switch.
 
Do you have an option in the bios under Advanced chipset setup to change the AT Clock select? Try set it to a faster speed to see if you can speed up the ISA bus.
 
From what I see, the bus has its own crystal (16.000 MHz) and is isolated from the CPU, which uses a 33 MHz crystal.

I'd assume they had to enable a wait state, since the chipset was made for a 286 and can not cope with the much faster 486 otherwise.
 
Did you find a datasheet for the Zymos POACH or the Intel POACH? I would be interested in the Zymos version. From what I have read, POACH based chipsets are not particularly fast.


I am guessing memory timing. Perhaps RAS-wait-CAS. I have a proprietary memory card that does the memory like this. CPU just issues a signal on the RAS and the CAS is done by the card. Any idea what it connects to?

I don't see anything that screams cache controller on that motherboard. I know of at least one implementation of a discrete logic cache controller, so perhaps? Any SRAM about?, is that some at the front? Wondered if the lack of L2 cache and that POACH means the CPU is always getting slow access to the ISA bus. Kinda like it is constantly out of sync, and hence poor performance.

Dunno about that DIP 16. Could be anything. If it is for a switch block, think it is unlikely they would socket a switch.
I was also only able to find the intel docs. There is 256kB of cache, and it's decently performant as evidenced by speedsys and cachechk.
Good point about the RAS to CAS delay, that's probably what its for.
Do you have an option in the bios under Advanced chipset setup to change the AT Clock select? Try set it to a faster speed to see if you can speed up the ISA bus.
There is no advanced chipset setup. This is basically what the CMOS setup looks like, except mine has an option for cache enable/disable and only one choice for shadow instead.images.jpg
 
Being that it is a custom chipset, I doubt any of those BIOS modding tools would uncover any hidden options. Doubt they work with BIOS this old. I'm not sure how customizable the POACH is. It states in the features "Up to 12 MHz System Clock Utilizing RAMs with Zero Wait States" Features at a glance. It's home to the 82288 bus controller so perhaps there is a line that controls it thats missing a jumper/broken pull-up/etc. Have to see the schematics in the datasheet. I guess you could always overclock it to 10 or 12MHz and see what happens? It's a bit of a kludge though, not really a proper fix. Did read that it was sluggish anyway though.
 
Being that it is a custom chipset, I doubt any of those BIOS modding tools would uncover any hidden options. Doubt they work with BIOS this old. I'm not sure how customizable the POACH is. It states in the features "Up to 12 MHz System Clock Utilizing RAMs with Zero Wait States" Features at a glance. It's home to the 82288 bus controller so perhaps there is a line that controls it thats missing a jumper/broken pull-up/etc. Have to see the schematics in the datasheet. I guess you could always overclock it to 10 or 12MHz and see what happens? It's a bit of a kludge though, not really a proper fix. Did read that it was sluggish anyway though.
I tried replacing the 16MHz oscillator with a 24MHz one and it did provide about ~15% improvement in ISA throughput, at the cost of making the KBC fairly glitchy. Interestingly, trying a 20MHz oscillator had absolutely no benefit over the 16MHz one.
 
The ISA bus having its own crystal instead of being driven by a division of the CPU clock sounds like a really sketchy design to me. If the ISA bus really is running asynchronous to the CPU logic the glue might just be generating a bu**load of extra wait states simply because it’s unavoidable.
 
Remember that ISA is an asynchronous bus by nature. I don't think most cards even use the clock pin.
 
Annnnnnnnd none of them had any observable effect on the system's performance, except switch 3 which prevented it from booting outright
 
Dumb thought but what happens if you try to sync both cpu and bus clocks to 16mhz?

Or 33/16 25/12.5, etc?
 
Remember that ISA is an asynchronous bus by nature. I don't think most cards even use the clock pin.

That's true, but there is still a clock source providing the cadence for signal timings and qualification... which really has me wondering how this Frankenstein setup actually works. If the ISA bus T-states are being determined based on a clock that's running completely asynchronously from the CPU's own 33.33mhz clock doesn't it seem inevitable that you're going to run into cases where transactions are going to need to be held until the access windows are lined up?... but maybe I'm not entirely clear on what pieces of that chipset are actually used in this arrangement. There's a bunch of glue and moving parts that a 286 chipset is going to be sort of clueless to handle, like generating the 486 bus sizing signals, I guess I'm not clear off the top of my head what's doing what on this.

tried replacing the 16MHz oscillator with a 24MHz one and it did provide about ~15% improvement in ISA throughput, at the cost of making the KBC fairly glitchy. Interestingly, trying a 20MHz oscillator had absolutely no benefit over the 16MHz one.

Just to sanity check this, is this observed improvement actually confirmed with a stopwatch? IE, you're certain you're not just making the system timers which are presumably being driven by the POACH's oscillator input, freak out, and do weird things to the benchmark? The datasheet for the chipset says it should have different accessory capacitors added for different speed crystals...
 
Observed improvement in all the synthetic benchmarks and also in doom timedemo

But again, confirmed with an actual handheld stopwatch? (Just trying to absolutely rule out some weird "Chang Modification" scenario.)

Assuming the improvement is real then I would guess that there's some kind of threshold-based thing in the glue logic that results in the time periods for... whatever, being close enough to the same for an effective 8mhz or 10mhz clock that it results in the same number of glue wait states on the 486 side while the 12mhz clock knocks off one.
 
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No lol no stopwatch but I can actually see the frames in the doom timedemo moving faster if that makes you feel better
 
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