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Eliminating the Wait State on the AT

Great Hierophant

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IBM PC ATs, whether run at 6MHz or 8MHz, have a 1 Wait State because the speed of the DRAM IBM used was not fast enough to complete a memory access in 2 clock cycles. Today, obtaining memory chips of the proper speed is easier and cost effective.

Of course, IBM put hardwired wait state logic into the machine. Is there a way to disable the logic and let the system run at a zero wait state setting without having to completely rewire the board?
 
I'm really interested in this topic. For a while I was just considering upgrading to an XT-286 motherboard, but it would be better if a modification could just be made to a regular AT planar. A while I tried searching for a way of doing this mod, but I came up empty handed.
 
Isn´t this also going to set off the speed check in BIOS (all versions after the initial release)? Not that patches have already been done for that particular aspect. I suppose this would be like going from the PS/2 Model 50 to the 50Z (the ´Z´ to denote it had zero wait states).
 
I have been trying to do some reading, and it seems that the wait state is probably being controlled by logic connected to the 82284 "ready interface" chip. I think if you are serious about eliminating the wait state, getting a copy of the schematic diagram for the XT/286 and comparing it to the one for the AT is probably one way to go about it. I think it's a doable mod, and I'd certainly be interested in doing this to one of my boards.

Does anyone on these boards have the technical reference manual for the XT/286 5162?
 
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I think even if the original poster has lost interest, it's still a very interesting topic. I wouldn't mind doing a mod like this to my AT either. I haven't been able to locate an XT 286 motherboard at a reasonable price.
 
Looking at the iAPX 286 book and the 5170 planar schematics, I am under the impression that the wait state is being generated by the IC at U77 which I believe to contain a flip flop.
 
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