The ISA card is generic. Will work in any PC/XT clone. It is the IDE & ROM portion of the JR side car board lifted up and put on a 8-bit ISA form-factor card.
The PLD could actually be eliminated if someone were interested in turning it back into a 74xx series project. A PLD was a logical (and in hindsight a correct) choice for rapid prototyping memory mappings. There were a number of code changes to address unforeseen problems and oversights that would have required many respins before hardening the design in fixed logic. Many modern ASICs and full systems are developed in this way using reconfigurable logic as a rapid prototyping tool.
I don't have a real 4.77 MHz bus clone nearby to test with atm, however some preliminary raw benchmarks on the JR seems to indicate 300 KB/s or more is possible using a single rep movsw to transfer in a sector. The only changes needed to the existing 74xx IDE designs is the carving out of an area at the top of ROM space for a 512 byte sector transfer window, a normal IDE 2x8 byte wide register area, and some additional combinatorial changes for latch enables and IDE address generation. The final PLD code can be used as a logical reference for anyone wanting to attempt it.
Unfortunately there is no current estimate on software as everyone is heavily interrupted atm including myself. But as soon as new mile-stones are reached, I'll post them here. I think all those involved with the project atm are intent on unifying software support (at least with the ISA version) with existing XT-IDE BIOS code. There is a board somewhere over the Atlantic for Tomi (Universal BIOS maintainer) to test with.