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Roland MIF-IPC card (not the -A)

pearce_jj

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I'm looking for information about the above card for a project involving an IBM PC 5150. Any information about it would be very useful, but in particular I'm interested in resources used.

The differences between the MIF-IPC and MIF-IPC-A would also be very useful.

A long shot I'm sure... but a schematic for the original and the DB25 cable pinout would be absolutely brilliant!! Never know when another Lo-tech PCB might be on the cards :)

Many thanks indeed for any information.
 
Thank you. Lots of dead links unfortunately. I really need the user manual scan that includes the schematics.
 
Would user selectable IRQ and port ranges be of any use? If so, some suggestions of options for each would be good.
 
That's a good question. I'd like to think that the IRQ and addressing options present with the MIF-IPC-A should be retained, but the reality is that they're mostly superfluous, as concerns the standard use cases.

Along those lines, the earlier MIF-IPC is differentiated in its use of partial address decoding in the MPU-401 itself. This, of course, means that (with some customization involved) it's possible to drive up to four, independently addressable MPU-401 units from a single MIF-IPC, for a combined 64-channels of MIDI. But, as interesting as it would be to see that functionality carried over into a new design, it's also something that was, and is, likely to never be used by anyone.

As you're looking at things, I'd be interested to know if you have any idea why use of the MIF-IPC is problematic in some later systems, while the MIF-IPC-A has no such troubles. There was some speculation years ago about the reset circuit being to blame.
 
Thanks. There are two differences between the original and -A revision:

  • On the original, A0/A1/A2/A3 are passed to the DSUB connector. On -A, only A0 is connected, and A1/A2 are ground. A3 isn't even present (pin 19 is presumably N/C).
  • On the -A, A0, /IORQ, and /RD are gated by the ISA RESET signal.

The first change enables the circuit to be simplified, since two buffers are eliminated at the cost of the feature you describe that was never used anyway. With three more address lines, up to 8 boxes could have been addressed (though I'm not sure how the external bus would be distributed to them).

The second change must though have been for a reason. Even though the reset signal is also present (DSUB pin 11), maybe some combination of signals at startup event (the only time RESET does anything) was causing the MPU-401 to crash or fail to initialise?

One other question: is the MPU-401 powered from the host PC via the 25-pin cable?
 
With three more address lines, up to 8 boxes could have been addressed (though I'm not sure how the external bus would be distributed to them).

The thought of addressing even just the four units supported by the existing circuitry seems electrically unsound enough as it is. :)

The second change must though have been for a reason. Even though the reset signal is also present (DSUB pin 11), maybe some combination of signals at startup event (the only time RESET does anything) was causing the MPU-401 to crash or fail to initialise?

Interesting. I'm not sure if this will help, but the problem, as I experienced it, is that with the MIF-IPC installed in a Pentium-based system (with attached MPU-401), there were no problems at all, but that same combination, when installed in a 386-class system, prevented that entire system from even POSTing. The MIF-IPC-A combination worked properly in both.

One other question: is the MPU-401 powered from the host PC via the 25-pin cable?
Yes, indeed.
 
The only signal the card controls that drives back to the PC is IRQ (2).

The RESET signal being asserted in the PC (high) holds A0, RD and IORQ low in the -A - this is a read from Port 0. Why that would be needed must depend on whatever is in the MPU-401 box I guess.
 
The only signal the card controls that drives back to the PC is IRQ (2).

The RESET signal being asserted in the PC (high) holds A0, RD and IORQ low in the -A - this is a read from Port 0. Why that would be needed must depend on whatever is in the MPU-401 box I guess.
The MPU-401 manual contains a full schematic:
http://media.rolandus.com/manuals/MPU-401_OM.pdf

I can also provide the MPU-401 Service Notes, if you're interested in those, but will need an additional day or two to get them scanned.
 
Thanks. The three signals simply go straight into the HD61J221F chip - whatever that is. But the address select logic is there (LS138), though it looks to be fixed in the same way that the IRQ and IO Port select are on the ISA card. So I guess originally the intention was to support setting the unit ID via jumpers etc, but the LS138 might not even be populated.
 
Question: could any software use more than one MPU-401 on a system? If there were two, they would appear at 330h and 332h, both sharing IRQ 2.

Voyetra Sequencer Plus perhaps?
 
does anyone know if theres anyone whos been able to clone the mif-apl card? i cant find one of these anywhere on planet earth!!! i have an extra mpu-401 i want to hook up to a c64 or an apple II but i cant :(( because cant find the other MIF cards!!!
 
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