Hutch's latest activity

I always assumed the use case for the IBM 3740 compatibility was as a "key punch" to write code or input data that would eventually be...

OK. I found a pattern. Bit 0 is alternating between 0 and 1 every other address. I don't think I've seen that mode before. Bit 1 is...

I'm working on an 8032 with bad system ram in both lower and upper banks. Pettester v4 is passing the video ram test and and moving on...

The Prototype was wooden with curved styling and a cassette drive. I've never seen that one before, it looks like someone's project...

AFAIK, the 6510 isn't drop-in compatible with the 8501. There are a couple of 8501 replacements being made. This one is FPGA, and he...

Booting to the MLM means the CPU is running into a BRK instruction (00) when it shouldn't. This is normally cause by a bad ROM. NOROM...

The Character ROM is not connected to the CPU Bus so no need to worry about the NOROM signal for the Character ROM. It remains in use...

There's a lot going on with the Super PET. I'm assuming you have the two board system, just the 8032 main board and one SuperPet board...

The standard P4 phosphor, for white CRT's, is made of a mixture of fine granules, both the complimentary colors, blue & yellow (in the...

It's tricky to find the right tube that's compatible electrically and mechanically for mounting. FWIW, There has been one success...

Ahh, yes. I see, that logic is only there for the read/write signal.

In theory, the MUX should only switch to the CPU address lines when the CPU is actually addressing video RAM. There's some logic with...

I haven't seen that one before, but it looks like an upper bit in the video address counter is failed and it's wrapping around to the...

I've seen this before. In my case the vSync was at 1MHz due to a floating output from a 74LS08 AND gate at C6 (on my 2001-8) On the...