• Please review our updated Terms and Rules here

A Homebrew Z8002

Now I have a CF mass storage, I can use it to load system program such as the monitor, BASIC, CP/M, etc. I need a lowest level bootstrap ROM in CPLD that copies a CF sector into RAM and executes it. To that end, I’ve modified the CPLD ROM to boot either from serial port or from the master boot record of the CF disk. Both bootstrap methods copy 512 bytes of code to $FE00-$FFFF then jump to $FE00 to execute the code. The switch between serial boot or CF boot is serial data ready flag or CF busy flag. Both flags are polled continuously after reset; if CF busy flag is first negated, then it will ignore serial port and copy/execute 512 bytes from master boot record of CF; if serial data ready flag is first asserted, then it will ignore CF and load 512 binary data from the serial port.

The ROM code is relatively small, but still bigger than 64 bytes, so I expanded the ROM to 128 bytes which utilized more CPLD resources. CPLD macrocell is now 96% utilized, just enough to accommodate the new ROM code.

With that capability, whatever program is in CF’s master boot record is immediately loaded and ran. Currently it is the Intel hex loader, but the goal is another CF file loader that, in turn, loads and runs larger program stored in CF disk, i.e., monitor or CP/M.
Bill
 
Using my Z80 monitor as the template, I have created a Z8002 monitor. It has the standard features of display/modify memory, load/run Intel Hex file, set/clear all memory, read/write IO ports, test memory, plus additional commands to install bootable copy of itself in CF disk and display specified CF sector. Commands X (format CP/M drives), and B (boot CP/M) are not yet implemented.

The "install bootable copy of itself in CF disk" command needs more explanation. This command saves the monitor program in memory (up to 4KB) to specific 8 sectors in CF disk; then install a bootstrap code in CF's Master Boot Record that copies the eight specific sectors in CF into memory and jumps to start the monitor when powered up. So once an updated monitor has been checked out, it can replace the previous monitor with one command. This is an easy way of updating system file without using external ROM programmer.

Now I’ve written a modest size Z8000 assembly program, I found it a pleasure to work with Z8000. The ability to work with byte, word, long, double operands, work directly with memory, having 16 registers, and new instructions, yet retaining the Z80 mindset are many pleasures of working with Z8000. I have enjoyed the experience of last few days.
Bill
 

Attachments

  • z8002_monitor.jpeg
    z8002_monitor.jpeg
    105.9 KB · Views: 6
I did some assembler work using the Z8000 many years ago, and I quite enjoyed the instruction set.

I also did some work on the 68000, and that was equally enjoyable.

My general impression of the 16-bit scene was that (in general) the instruction set, registers and addressing modes were somewhat more 'refined' than their 8-bit counterparts.

Glad to see you are proceeding at pace now. I am still intrigued by that misbehaving I/O instruction though...

I will have a hunt for my Z8K chips and see if I can breadboard something up myself. I have to break the back of an Arduino project first though.

Dave
 
I’ve placed an order for Z8002 so hopefully they won’t have the bugs I experienced with the 1979-dated parts. While waiting for Z8002, I’ll document the design, layout a pc board that can accommodate both Z8002 and Z8001, and research about CP/M for Z8002. Is there such thing as CP/M for Z8002?
Bill
 
It appears that CP/M-8000 can run on Z8002, provided it has 128kB of RAM (64kB OS in system mode and 64kB TPA in user mode). However, all available information indicates that physical implementations were based on Z8001.
Unfortunately, the carrier held my parcel over the weekend, so I won't be able to check whether the behaviour of the Z8002 from the 1990s will be different from what I have. I will try to look into this matter in the coming week, but it will be extremely difficult due to a radical change in my personal life. I am not even sure if I will have time for new projects in the near future. I will be closely monitoring your progress and wish you every success in completing it.
 
I was going to say a similar thing. Z8k applications were quite memory-hungry (from what I remember) so a few 'tricks' were pulled to get as much memory as possible shoehorned into the Z8002 (as @tapy states).

Hope things pan out for you personally @tapy.

Dave
 
It appears that CP/M-8000 can run on Z8002, provided it has 128kB of RAM (64kB OS in system mode and 64kB TPA in user mode). However, all available information indicates that physical implementations were based on Z8001.
Unfortunately, the carrier held my parcel over the weekend, so I won't be able to check whether the behaviour of the Z8002 from the 1990s will be different from what I have. I will try to look into this matter in the coming week, but it will be extremely difficult due to a radical change in my personal life. I am not even sure if I will have time for new projects in the near future. I will be closely monitoring your progress and wish you every success in completing it.

I have enough RAM on my prototype board to have 64K OS and 64K TPA. So I can just wire Z8002’s N/S output to one of RAM’s address line to accomplish this? That’ll be easy to do.

Thank you for your well wishes, I also wish you can quickly overcome the challenge in your life. Best wishes,
Bill
 
That is the simplest (and easiest) way.

I do believe that the CP/M-8000 TPA space can be further split into code (I) and data (D) spaces to further increase the size of programs that can be executed. However, I believe this to require a switch at link time. Although I think that most programs are shipped in relocatable format?

The Z8001/2 can use the N/S signal to differentiate between two separate 64K areas, but then you can use the status lines to further partition this into code, data and stack. Not sure how many of these are actually supported by CP/M-8000 though. Perhaps just system mode (all combined) = 64K and then 64K for each of the normal mode program and combined data/stack?

Last time I looked at the CP/M-8000 System Guide I confused myself!

1757933728368.png
EDIT1: Page 4-31 of http://www.cpm.z80.de/randyfiles/DRI/CPM8000_systemGuide.pdf is interesting. It maps logical to physical addresses using 'space codes' and can be used in a non-segmented TPA mode. How is another matter...

EDIT2: After reading the CP/M-8000 manuals again it would appear as though the SYSTEM MODE combines things together into a single 64K segment - so splitting this region into separate 64K areas is not sensible. However, the TPA supports separate I and D space, so 64K of memory can be allocated to an 'I' area; and a separate 64K of memory can be allocated to a separate 'D' area. This behaviour is determined by the linker -i option. However, there seems to be a statement I found that certain [larger] utilities REQUIRE separate I and D space for running within the TPA. Unfortunately, I can't find it again...

EDIT3: I found it again in http://www.cpm.z80.de/randyfiles/DRI/CPM8000_systemGuide.pdf on page 2-1.

1757938869965.png
Dave
 
Last edited:
Thanks for the link to the system guide. I’ve read enough of the guide to see it is very similar to CP/M 2.2 for Z80. My monitor has enough capability to load CP/M.SYS from CF disk to memory, so I don’t need to do the bootloader dance. The big question is whether I can build and link BIOS for my hardware with Z8000’s CCP and BDOS without a CP/M-8000 machine like M20. I doubt the sources of BDOS, CCP are available, so I’ll dig around for binaries and hope to find a fixed jump tables where BIOS can hook into BDOS like CP/M 2.2.
Bill
Edit, I’ll use Z8002’s S/N output to create system 64KB and TPA 64KB. I think that’s enough for non-segmented CP/M, but if not, I have 256KB of RAM, so I can create more memory spaces if needed.
 
Last edited:
Bill,

The full sources for CP/M-8000 are available.

I will post a link when I get into work (just running out of the house at the moment).

Dave
 
The sources are here: http://www.cpm.z80.de/source.html.

1758010325811.png
I went for:

1758010355982.png
This appears to be the 'latest' (1.3).

However, there doesn't appear to be the sources for the assembler, C compiler or some of the other utilities. Some of the other disks contain some of the other utilities (but perhaps not the source). I fear we may be into making a 'frankenCP/M' if we are not careful.

Perhaps better to take one of the complete distribution disks and generate a new BIOS?

There is an Olivetti M20 emulator around, so that may be the best route to building the executable?

This is where we need @Dwight Elvey to chime in (being the expert)...

EDIT: Full sources are here:

1758015389280.png
I am currently trying to locate the Kontron Z8002 adaptions...

EDIT: They seem to be in the 'newos' directory with a numeral '2' just before the file extension [period] separator (so biosboot2.z8k instead of biosboot.z8k). The number of 'adaptions' seem fairly extensive, so (I assume) using a 'standard' CP/M-8000 (designed for a Z8001) looks less likely to work...

Dave
 
Last edited:
I managed to find some time to test the software on the original Zilog processor. Unfortunately, the issue persists, so it is not a processor-related issue. All that remained was to use a logic analyser to examine what was happening on the bus. Currently, only one suspect remains – Z-SCC, specifically its ability to process initialisation commands. I am unable to configure it correctly using the OTIRB instructions, and executing a loop using OUTIB always succeeds due to its longer execution time.

It is worth familiarising yourself with the CP/M-8000 source code from the repository https://github.com/4sun5bu/Z8001MB

PS. I received a working CPU with its original markings, which is not always the case with purchases from China.

CPU_Z8002.jpg
 
I have expanded memory to 128K based on Z8002’s N/S output. I can expand to more memory if I decode the instruction/data access, but it’s unclear to me how CP/M deals with that when loading program into instruction space.

Downloaded various files from suggested links. Sources in C are more difficult to hack without a M20 or simulator. CP/M8000 will be hard to implement, at least for me. I have this naive idea of putting CCP, BDOS in fixed memory locations, then overlaying evolving BIOS routines to get CP/M working incrementally. That probably won’t work. It is possible CCP, BDOS for Z8002 is different than Z8001, so I maybe in a catch-22 situation of needing Z8000 C compiler to build new cpmsys for new Z8002 hardware. So is there a M20 simulator?

Another thought, since I’m mostly a hardware guy, it may be possible to emulate M20 with Z8001 and programmable logic sufficiently so that the existing CP/M8000 for M20 can run on such emulator. Any work along that line of M20 emulation?
Bill
 
I have expanded memory to 128K based on Z8002’s N/S output. I can expand to more memory if I decode the instruction/data access, but it’s unclear to me how CP/M deals with that when loading program into instruction space.

Downloaded various files from suggested links. Sources in C are more difficult to hack without a M20 or simulator. CP/M8000 will be hard to implement, at least for me. I have this naive idea of putting CCP, BDOS in fixed memory locations, then overlaying evolving BIOS routines to get CP/M working incrementally. That probably won’t work. It is possible CCP, BDOS for Z8002 is different than Z8001, so I maybe in a catch-22 situation of needing Z8000 C compiler to build new cpmsys for new Z8002 hardware. So is there a M20 simulator?

Another thought, since I’m mostly a hardware guy, it may be possible to emulate M20 with Z8001 and programmable logic sufficiently so that the existing CP/M8000 for M20 can run on such emulator. Any work along that line of M20 emulation?
Bill
There is a L1M20 Emulator module for the MAME (Multiple Arcade Machine Emulator) and Olivetti hade a Z8001 Coprocessor card for certain models there IBM compatible PC line.
Another user on this form made his own L1M20 replacement board using the Z8001 and newer gate arrays, but that's about all. (See user tpaxia entries on this host if the are still active)
The trump card is another Z8001 based ISA bus co processor.
..
Ya the Z8002 is slightly difference : No segmentation pointers and no Segment/Bus error signal line. The program status memory map is a little different as well. So on the Onyx Z8002 model computers they use there
own MMU and segment bus error logic. (In a nut shell/in short).
In the past there where a couple of authors in Japan that did build a Z8002 based CP/M system, but who know if there website is still active and if the will help out ? They likely crossed compiler CP/M from another source with similar hardware that had a identical I/O and address map in order to get it to run in a only 64k memory space.
..
If you are using 256K drams without MMU you could still add a bit more memory by decoding the Stack and Data spaces into separate 64K blocks as well but the support for this will have to added to the OS to make good use of it.
The standard CP/M8000 OS needs 128K of memory for operation unless you want to cut of the compatibility to run existing programs and then you you are going to to patch and recompile code in order to run it on the system.
..
If that is the case I would try to find a complete documented Z80 CP/M system with the OS that perfectly match's your existing hardware. Addressing and register wise if one actually exist and then cross assemble all its applications and OS
to the new hardware.
..
By the way the way is another posting about using the MS-DOS version of the Zilog Z8000 Assembler under a newer version of MS Windows with a MS_DOS emulator module, if that will help any.
..
Well that is about all I can add, so hopefully it is of some help.
 
Last edited:
A broad assessment of the state of Z8000, thank you. I will wait a while to see whether people you’ve mentioned chime in with additional info. I also have two Z8001, so I’m currently designing a pc board that can accommodate both Z8001 and Z8002. Maybe through Z8001 I can find an easier path to get CP/M 8000 running.
Bill
 
The 'magic' is done in biosmem2.z8k - however, I think that some form of simplified memory-mapping has to be implemented within hardware to write to the code space (I) as data (D).

Half the fun is trying to get a Z8002 running CP/M-8000 with I and D space - although a comment in biosmem2.z8k is troublesome:

Code:
;* space codes:
;*    0:    caller data
;*    1:    caller program
;*    2:    system data
;*    3:    system program
;*    4:    TPA data
;*    5:    TPA program
;*
;*    The following does not apply in Z8002 case
;*
;*    x+256    x=1, 3, 5 : segmented I-space addr.
;*                instead of data access
;*
;*    FFFF:    set user segment

Although something similar has to apply if using 64K system and 64K user memory spaces.

Some words of wisdom from Dwight in a post:

Code:
I do think it could be done on a Z8002 with some bank
switching tricks.
The Z8002 can directly access 128K of RAM if you split
the instruction and data spaces. The only disadvantage
of doing this is that you'd need a way to map the instruction
memory into data space to load the RAM and then switch
it back to the 128K mode to run the code.
The M20 does this but handles it but using different segments.
One could do this with a bank switching trick on the Z8002.

Dave
 
I was wondering how Z8000 move data into user space while executing in system space. Maybe the same mechanism can be used for data/instruction split. Alternatively with hardware I can create a couple registers that when cleared (reset state) force a unified 64K system/user/instruction/data space. One register enables system/user split and another register enables data/instruction split.
Bill
 
I think I would follow in the footsteps of Naoya Murata from the aforementioned repository. The BIOS sources are written in assembler, and the whole thing is linked in non-segmented mode. If you have a working CP/M-8000 thanks to this method, you can try to build this system from Digital Research's C sources.
 
I received two SGS Z8002B1 today and plugged into my prototype board. Both worked right away. Then I ran a program with direct I/O addressing, it also worked whereas the same program hung with 1979-date code Z8002. While SGSZ8002B1 is rated at 4 Mhz, I found it worked up to 11Mhz, so I now doubled the clock to 7.37mhz. I will run with SGSZ8002B1 from now on.
Bill
Edit, I’ve found Zilog parts to be very conservative, especially CMOS parts which frequently can run at double or triple their rated speed. If I ever find the CMOS version of Z8002, Z16C02, which is rated at 10Mhz, I will try to run it at 20, maybe 30Mhz. That should make a speedy retro computer.
 

Attachments

  • IMG_5717.jpeg
    IMG_5717.jpeg
    1.9 MB · Views: 5
Last edited:
Back
Top