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an ODT for T-11

saipan59

Experienced Member
Joined
Dec 27, 2010
Messages
259
Location
Colorado Springs
Not sure if this is "useful", but I implemented an ODT subset to run on a T-11 with RAM, EEPROM, and an MC68B50 UART.
It does the CR, LF, / and G functions of ODT.
At the moment it doesn't support Register access (just memory addresses), since the code has to use registers itself.
Code listing attached.

Questions/comments welcome!
Pete

View attachment ODT_LST.txt
 
Updated so that an ESC key or HALT will dump register contents and PSR, and return control to ODT. It captures the machine state in a RAM area, so I suppose I could now allow register editing, then Resume execution, but right now I don't think I'll take it that far.
Also various other improvements. Code attached.

Pete
 

Attachments

  • ODT_LST.txt
    34.5 KB · Views: 15
Highly modified PDP-2011 - Processor debugging - how It looks
Code:
PDP-11/35 (124KW) (PDP-2011 based) FullODT for halt mode (in development :))

>>>B HX0

HX 2.2  XXDP  Cold boot..



BOOTING UP XXDP-XM EXTENDED MONITOR


XXDP-XM EXTENDED MONITOR - XXDP V2.5
REVISION: F0
BOOTED FROM HX0
124KW OF MEMORY
UNIBUS SYSTEM

RESTART ADDRESS: 152000
TYPE "H" FOR HELP !

.R BKTDC0
BKTDC0.BIC

PDP11/40 PROCESSOR STATES TEST, DBKTD-C
#
>>>R
R0=140350  R1=004642  R2=000676  R3=001004  R4=000700  R5=000700
SP=000734  PC=004714  PS=030344
>>>4524!
004524  012737  030000  177776  MOV     #30000, @#177776
004532  012706  001000  012767  MOV     #1000, SP
004536  012767  177777  174236  MOV     #177777, 1002
004544  005066  177776  012737  CLR     177776(SP)
004550  012737  004576  000004  MOV     #4576, @#4
004556  005037  000006  012737  CLR     @#6
004562  012737  000400  177774  MOV     #400, @#177774
004570  006567  174206  000000  MFPI    1002
004574  000000  022767  177777  HALT
004576  022767  177777  174172  CMP     #177777, 776
004604  001401  000000  022767  BEQ     4610
004606  000000  022767  030010  HALT
004610  022767  030010  174156  CMP     #30010, 774
004616  001401  000000  022767  BEQ     4622
004620  000000  022767  004574  HALT
004622  022767  004574  174142  CMP     #4574, 772
004630  001401  000000  005037  BEQ     4634
004632  000000  005037  177774  HALT
004634  005037  177774  010701  CLR     @#177774
004640  010701  012737  004714  MOV     PC, R1
004642  012737  004714  000004  MOV     #4714, @#4
004650  012737  030340  177776  MOV     #30340, @#177776
004656  012706  000736  012766  MOV     #736, SP
004662  012766  177777  177776  MOV     #177777, 177776(SP)
004670  005067  174106  012703  CLR     1002
004674  012703  001004  012737  MOV     #1004, R3
004700  012737  000400  177774  MOV     #400, @#177774
004706  006563  177776  000000  MFPI    177776(R3)
004712  000000  022737  177777  HALT
004714  022737  177777  000734  CMP     #177777, @#734
004722  001401  000000  005706  BEQ     4726
004724  000000  005706  001401  HALT
004726  005706  001401  000000  TST     SP
004730  001401  000000  022737  BEQ     4734
004732  000000  022737  030344  HALT
004734  022737  030344  000002  CMP     #30344, @#2
004742  001401  000000  022737  BEQ     4746
004744  000000  022737  004712  HALT
004746  022737  004712  000000  CMP     #4712, @#0
004754  001401  000000  005037  BEQ     4760
004756  000000  005037  177774  HALT
004760  005037  177774  012737  CLR     @#177774
004764  012737  000006  000004  MOV     #6, @#4
004772  010701  012706  000500  MOV     PC, R1
004774  012706  000500  012737  MOV     #500, SP
 
Great work Pete! If I ever find enough time, I'd really like to put together a T11 SBC. When I do, this code will surely be on it!

-Dave
 
>Great work Pete! If I ever find enough time, I'd really like to put together a T11 SBC. When I do, this code will surely be on it!

Thanks Dave! In case it is useful, attached is the schematic for my board. It does the "8-bit static" mode, which is the simplest mode. I think this is pretty much the most bare-bones circuit that is useful.

Pete
 

Attachments

  • T11_bd_V1_1-1.jpg
    T11_bd_V1_1-1.jpg
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  • T11_bd_V1_1-2.jpg
    T11_bd_V1_1-2.jpg
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  • T11_bd_V1_1-4.jpg
    T11_bd_V1_1-4.jpg
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  • T11_bd_V1_1-5.jpg
    T11_bd_V1_1-5.jpg
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>Great work Pete! If I ever find enough time, I'd really like to put together a T11 SBC. When I do, this code will surely be on it!

Thanks Dave! In case it is useful, attached is the schematic for my board. It does the "8-bit static" mode, which is the simplest mode. I think this is pretty much the most bare-bones circuit that is useful.

Pete
Ah ok, thanks for that! I started drawing one up last year, but never finished it.

-Dave
 
I'm apparently still working on this ;-).
I added single-step capability - all in software, using Trace-Trap. It's the first time I've done anything with the "T-bit" - it took me hours to get a couple of bugs out.
The "+" key does a SST, after breaking out of the code using ESC.
Code attached.
Here is a sample session with single-stepping (see the "TEST" routine in the code):
ODT
@42560G
177762 040500 053157 167011 000006 000147 000376 042570 000240 ODT
@
177762 040500 053157 167010 000006 000147 000376 042572 000270 SST
177762 040500 053157 167010 000006 000147 000376 042600 000260 SST
177762 040500 053157 167010 000006 000147 000374 042606 000260 SST
177762 040500 053157 167010 000006 000147 000374 042610 000260 SST
177762 040500 053157 167010 000006 000147 000374 042612 000260 SST
177762 040500 053157 167010 000006 000147 000372 042622 000260 SST
177762 040500 053157 167010 000006 000147 000372 042624 000260 SST
177762 040500 053157 167010 000006 000147 000372 042626 000260 SST
177762 040500 053157 167010 000006 000147 000374 042616 000260 SST
177762 040500 053157 167010 000006 000147 000374 042620 000260 SST
177762 040500 053157 167010 000006 000147 000376 042604 000260 SST
177762 040500 053157 167010 000006 000147 000376 042560 000260 SST
177762 040500 053157 167010 000006 000147 000376 042566 000264 SST
177762 040500 053160 167010 000006 000147 000376 042570 000260 SST
177762 040500 053160 167007 000006 000147 000376 042572 000270 SST
177762 040500 053160 167007 000006 000147 000376 042600 000260 SST
@

Pete
 

Attachments

  • ODT_LST.txt
    39.2 KB · Views: 15
Made in 1991:
T11(Soviet clone 1807VM1)+74LS373+74LS393+74LS04+74LS08,
2K ROM(UV), 2K Static RAM, i8251 UART + opto.
ODT - full analog LSI-11.
 

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  • 1807vm1-.jpg
    1807vm1-.jpg
    465.6 KB · Views: 49
Last edited:
>Great work Pete! If I ever find enough time, I'd really like to put together a T11 SBC. When I do, this code will surely be on it!

Thanks Dave! In case it is useful, attached is the schematic for my board. It does the "8-bit static" mode, which is the simplest mode. I think this is pretty much the most bare-bones circuit that is useful.

Pete
Pete,

This is the board a few of us built a while back, right? I can’t recall if it was a kit or just a bare board. I got mine working and it’s in my shop somewhere. Time to dig it out!

-Crawford
 
>Pete, This is the board a few of us built a while back, right? I can’t recall if it was a kit or just a bare board. I got mine working and it’s in my shop somewhere. Time to dig it out! -Crawford

Hi, I made a PCB back in 2015, and re-sold several of them to various folks. Some were "kits" of parts to stuff the board with. I kept two for myself. I sent my version of FigFORTH on an EEPROM. Here's a pic of the assembled board.
BTW, you may recall that there was an issue with flakey behavior related to the MC6850 UART. I believe I have a firmware "fix", if you're interested.
Pete

assembled.jpg
 
Pete,

Yes, I have that board. I would like to apply the fix and get it running again.

I’ll send a PM with my email so’s to not drag this further offbase. Looking forward to ODT progress!

-C
 
Pete: Could you send me a copy of the "fix" as well? Thank you. - paul
Just now sent info and code to the email indicated by your forum name.

For other's interest, here is a description of the solution:

My *belief* is that the UART issue was when the code would test the Receive Ready (or Transmit Ready) bit before sending/receiving a byte. The T-11's bus behavior of "read before write" and such confused things for the UART.

I set up a receive interrupt, so that testing the Receive Ready bit is never needed. Received chars go into a small buffer, and Forth pulls chars from that buffer.
For Transmit, there is a fixed time delay to wait for the UART to finish sending (not efficient, but simple and effective).
With these changes, I can no longer reproduce any problems.

Pete
 
BTW, you may recall that there was an issue with flakey behavior related to the MC6850 UART. I believe I have a firmware "fix", if you're interested.
maybe it's worth trying to change bit 1 and/or bit 8 (Mode Register) when the processor starts?
T11_UsersMan-73-.gif
T11_UsersMan-66-.GIF
T11_UsersMan-75-.gif
or consider this:

T11_UsersMan-228-.GIF
 
maybe it's worth trying to change bit 1 and/or bit 8 (Mode Register) when the processor starts?

Yep, did all those experiments in various combinations years ago.
Setting those mode bits to match the HW config is required at every power-up. My "sandbox system" has DIP switches to make it real easy to try different things.

The fix I described with adding Receive interrupt support is easy, and is really much better overall, since the original Forth system POLLED for incoming chars which makes it hard to run any sort of 'background task'. And my newer code also uses the Receive interrupt to test for an ESC char, which is used to break out of a running task and warm-start the system. Real basic OS stuff.

It should also be possible to avoid the UART issue by adding some HW logic in the Chip Select area, but I never tried it.

Pete
 
I never assembled that board <ashamed>, have to search where I stored it ...
Hey Henk! Glad to hear from you again!
I should mention: On those PCBs, of course the interrupt is not connected. On mine, the UART IRQ signal is "ECO-wired" to CP3 (pin 33) on the T-11. The interrupt vector will then be at address 114(8).

Pete
 
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