So I've been spending a few free hours with a friend every week hacking away at this idea, and it's more difficult than I'd thought. (Surprise!) But I do have a tentative prototype worked out. All the files can be found on the dev/cjs/25g03/rom-read-adapter branch of my hwdev repo, but here's a summary. First, the schematic:
The idea here is that you can plug any device you like into the ZIF socket, the pins of which are connected to the host only via jumpers. The pins of the ZIF socket are connected only to .1" headers in a central "work area" (this will be more clear in the board layouts below); those are connected to the host header only via jumpers. There are two types: "default jumpers" for a subset of signals which are right next to certain pins on the socket header pins, which you can connect with a standard two-position jumper, and the remainder, which need to be connected with "dupont" female-female jumper wires giving access to all signals.
The host header may seem a slightly strange layout, but it's designed to make easy connections to a pair of 8255 parallel interface chips on my SuperAKI-80 board in a way that's sensible to software, to ease writing the software. (Basically: ports 0A, 0B and 0C for address lines and chip select outputs, and ports 1A and 1B for data inputs.) I'll consider doing some sort of different header that works more easily with a broader variety of boards at a later date.
The actual layout looks like this.
(The bottom view is attached below.) Here you can see the central "work area" that's full of .1" headers. Right in the middle are the two rows of header pins connected to the ZIF socket, along with pin numbering guides for 24-, 28- and 32-pin memory devices. Right next to them are the "default jumper" pins on which you can place two-position jumpers for common defaults. I've avoided setting defaults for pins such as pins 18 and 21 on a 24-pin device that have two common defaults in order to indicate that these vary enough among devices that you're going to need to look up what you really want to connect to those. VCC, ground, and true logic and inverted chip selects are easily available at the left and right, and at the top and bottom are the full collection of address and data lines. For a typical 40-pin ROM none of the defaults match and you'd need to jumper everything by hand.
Though it's definitely not the final version, I've just ordered a set of these boards as-is so I can sit down and try to do some jumpering to see how the spacing of things works out. If I need more vertical spacing the host connector can move to the left of the ZIF socket (though that makes routing a screaming pain—not that this as it stands was easy for a beginner like me), otherwise the ZIF socket can move a bit to the left and give more horizontal space. I've tried to put a good bit of space between the ZIF socket and the left-hand VCC/CS/~CS/GND headers, but I've no idea if that is too little and will be too cramped, or too much and maybe I can move everything left a bit and get the right-hand silkscreen off the edge of the board. (And I notice my horizontal line across the top covering the address pins has vanished; I wonder where that happened.)
I'm not happy with the position of the bypass cap, but I realised some way into this that, while it really should be on the pins of the ZIF socket itself rather than so terribly far away from it; there is no fixed assignment of VCC and GND on the ZIF, so near the work headers seems to be as close as it can get. I wonder if perhaps more bypass caps would help; I'm not really sure.
Anyway, I'm open to thoughts on this. I expect that there are a lot of improvements than can be made and problems that can be fixed that I just haven't thought of.
The idea here is that you can plug any device you like into the ZIF socket, the pins of which are connected to the host only via jumpers. The pins of the ZIF socket are connected only to .1" headers in a central "work area" (this will be more clear in the board layouts below); those are connected to the host header only via jumpers. There are two types: "default jumpers" for a subset of signals which are right next to certain pins on the socket header pins, which you can connect with a standard two-position jumper, and the remainder, which need to be connected with "dupont" female-female jumper wires giving access to all signals.
The host header may seem a slightly strange layout, but it's designed to make easy connections to a pair of 8255 parallel interface chips on my SuperAKI-80 board in a way that's sensible to software, to ease writing the software. (Basically: ports 0A, 0B and 0C for address lines and chip select outputs, and ports 1A and 1B for data inputs.) I'll consider doing some sort of different header that works more easily with a broader variety of boards at a later date.
The actual layout looks like this.
(The bottom view is attached below.) Here you can see the central "work area" that's full of .1" headers. Right in the middle are the two rows of header pins connected to the ZIF socket, along with pin numbering guides for 24-, 28- and 32-pin memory devices. Right next to them are the "default jumper" pins on which you can place two-position jumpers for common defaults. I've avoided setting defaults for pins such as pins 18 and 21 on a 24-pin device that have two common defaults in order to indicate that these vary enough among devices that you're going to need to look up what you really want to connect to those. VCC, ground, and true logic and inverted chip selects are easily available at the left and right, and at the top and bottom are the full collection of address and data lines. For a typical 40-pin ROM none of the defaults match and you'd need to jumper everything by hand.
Though it's definitely not the final version, I've just ordered a set of these boards as-is so I can sit down and try to do some jumpering to see how the spacing of things works out. If I need more vertical spacing the host connector can move to the left of the ZIF socket (though that makes routing a screaming pain—not that this as it stands was easy for a beginner like me), otherwise the ZIF socket can move a bit to the left and give more horizontal space. I've tried to put a good bit of space between the ZIF socket and the left-hand VCC/CS/~CS/GND headers, but I've no idea if that is too little and will be too cramped, or too much and maybe I can move everything left a bit and get the right-hand silkscreen off the edge of the board. (And I notice my horizontal line across the top covering the address pins has vanished; I wonder where that happened.)
I'm not happy with the position of the bypass cap, but I realised some way into this that, while it really should be on the pins of the ZIF socket itself rather than so terribly far away from it; there is no fixed assignment of VCC and GND on the ZIF, so near the work headers seems to be as close as it can get. I wonder if perhaps more bypass caps would help; I'm not really sure.
Anyway, I'm open to thoughts on this. I expect that there are a lot of improvements than can be made and problems that can be fixed that I just haven't thought of.
