My guess, assuming it is a single core plane, based on what look to be address decoders on the edges, this may be 1KW of memory, that is 1024 x 48 bits, so a total of 48Kbits or 6Kbytes, which would match your "...a 50Kb module" statement.
If you can place the board on an image scanner and get a close up picture we might be able to identify the chips involved and other features which might be more conclusive.
It's been a long time, but what little I can recall from my RFQ work (know the competition), wasn't the B6700 used as a frontend to the BSP?
I don't know how many BSPs were actually deployed, but supercomputers were never a quantity seller. We had a couple of bids out against BSP proposals, but neither we (CDC) nor Burroughs won. The TI ASC was another competitor back then--I don't know if they ever sold any. Cray picked up the lion's share of sales right about then (early 70s).
I've never heard of it described this way, do you have a reference for the memory layout you describe which suggests that the B6700 had 60-bit memory words?... Each one of these assemblies was 20 bits of a system word, and 3 boards made a complete 60 bit word. The extra bits were used to correct single bit errors on the fly, and detect multiple bit errors. I'm thinking they were 32K x 20 bits each.
B6700 Reference Manual ([url]http://bitsavers.org/pdf/burroughs/B6500_6700/1058633_B6700_RefMan_May72.pdf[/url]),
page 1-8 in the section on "Memory Words":
Each memory word contains 48 information bits, three control bits, and a parity bit.
I've never heard of it described this way, do you have a reference for the memory layout you describe which suggests that the B6700 had 60-bit memory words?
I am using this reference where it states:
for a total of 52-bits per addressable word.Code:B6700 Reference Manual ([url]http://bitsavers.org/pdf/burroughs/B6500_6700/1058633_B6700_RefMan_May72.pdf[/url]), page 1-8 in the section on "Memory Words": Each memory word contains 48 information bits, three control bits, and a parity bit.
I also read in the Burroughs B6700 Handbook Volume I Hardware, in section 8 (Interface Cables) which details the memory subsystem I see just 52-bus lines described connecting the CPU to the memory subsystem.
All you needed in addition to the box was an MG set (208V-3-phase-400Hz), the usual HVAC for peripherals and a chilled water supply for the CPUs. Aren't you glad that you're not collecting those?
I seem to recall the B6700 used enough power for several suburban homes. The AC power mod ran on three phase, although I don't remember the voltage. Each of the mainframe boxes had a 400A or 600A logic supply with the odd voltages of 4.75 and -2v. Handy way to heat one's house. ;-)
I can believe it; when I worked with Burroughs they had one for a while in the DP room where I would occasionally use its smaller sibling, a 2700, and it was a biggie all right.I seem to recall the B6700 used enough power for several suburban homes. ...Handy way to heat one's house. ;-)
The B6700 hardware manual lists several other voltages too: for the core-memory system there are +1V, -50V, +63V and +37V. In another part of the CPU/DCP system there are also +12V and -12V - the power supplies must have been quite complex to supply so many different voltages.Each of the mainframe boxes had a 400A or 600A logic supply with the odd voltages of 4.75 and -2v. Handy way to heat one's house. ;-)
Well as that picture came from my website and yes it is the UTAS B6700As a matter of fact that's probably yours in the picture, Nigel.