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CAD tool for DEC style mixed logic

thunter0512

Veteran Member
Joined
Sep 27, 2020
Messages
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Perth in Western Australia
Is there a CAD tool which allows me to draw "mixed logic" as used in most DEC schematics.

Example:

mixed logic example.png

The image above shows a logical AND of two active low signals AE1 and MA0IL. The actual physical implementation is a NOR gate.

Bonus points for a software package which lets me draw and simulate a complex "mixed logic" circuit.

Thanks
Tom
 
You can make your own components in kicad so you can draw anything you want... Most schematic/pcb programs allow to make your own symbols BTW... There is also a possibility to simulate electronics in kicad, but I haven't tested that.
 
With current kicad if the library supports it you can right click on the symbol and select De Morgan Conversion to convert the gate. The standard 7400 library had De Morgan option for the part I checked.
 
With current kicad if the library supports it you can right click on the symbol and select De Morgan Conversion to convert the gate. The standard 7400 library had De Morgan option for the part I checked.
Thanks David. I tried with KiCAD version 5.1.6 and right clicking on a 74LS00 I previously placed did not give me a De Morgan Conversion option.

I think version 5.1.6 is the last version of KiCAD which runs on my Windows 7.
 
I am reading the book "The Art of Digital Design" by Franklin P. Prosser and David E. Winkel. and learned about "mixed logic" which was new territory for me as a retired embedded software engineer.
Being able to draw and possibly simulate a "mixed logic" circuit would be useful.
I am dreaming about designing a PDP-8/s style machine using "mixed logic" and then actually implement it using 74LS series ICs.
 
With current kicad if the library supports it you can right click on the symbol and select De Morgan Conversion to convert the gate. The standard 7400 library had De Morgan option for the part I checked.
I found it in KiCAD. After right click it is under "Properties | Convert". Thanks for your help!
 
I would suggest designing it in a logic simulator first to iron out the bugs...

I used LOGISIM when I did my PDP-8/I implementation from that book. I managed to get the MAINDECs and CHEKMO II (the chess program) running.

Interestingly, the MAINDEC's found a problem with the book implementation that I subsequently fixed. The original 'test for correctness' was whether it ran FOCAL correctly or not.

Dave
 
I would suggest designing it in a logic simulator first to iron out the bugs...

I used LOGISIM when I did my PDP-8/I implementation from that book. I managed to get the MAINDECs and CHEKMO II (the chess program) running.

Interestingly, the MAINDEC's found a problem with the book implementation that I subsequently fixed. The original 'test for correctness' was whether it ran FOCAL correctly or not.

Dave
Thanks Dave for your suggestion.
What version of LOGISIM did you use? There is the original which is no longer maintained but there is also the more up-to-date Logisim-Evolution (https://github.com/logisim-evolution/logisim-evolution).
Would you be able to share your LOGISIM implementation of the PDP-8/I which runs MAINDECs or other software?
I am amazed that you managed to run non-trivial software on the simulation.

Tom
 
It is already on my Google drive and I provided links to it from the many, many threads and posts Marty and myself made on the subject.

I will post a link to it in this thread later today when I boot the desktop machine up.

Yes, it was impresive to get this software running as you said! However, it does (of course) fly like a brick...

I have updated my desktop LOGISIM from the 'old' one to the 'new' one. I can't quite remember now which version I posted.

Dave
 
I can't guarantee that this is the latest code though (or for which version of LOGISIM this is for)...


The reason being that I updated my iMac from an Intel to an M1 and I am slowly getting around to updating my applications. Some will run on the M1, others will not.

I haven't got around to sorting out Java on my M1 yet - although I suspect this is a good reason to sort it out!

If I remember correctly, you need to import the binary executables into the LOGISIM component simulating the CORE memory.

Also, there were some 'standard' LOGISIM 7400 libraries that I were using that were incorrect. I have included my modified libraries with the code.

Let me know if you need any help to get it to run...

Dave
 
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OK, so I wasn't 100% correct in my last post.

I have just downloaded Java on my M1 and got it to run...

I am using the original Logisim V 2.7.1 on Java V 19.0.1 (10.21) on my Mac M1 processor.

The main file is PDP8-LD12.circ and you require the libraries 7400-lib and 74181 that I have included.

The other files (ending in .logisim) are the files that you can load into the internal CORE memory.

The dxxx files are the associated MAINDECs and CHEKMO should be obvious.

I will have to reacquaint myself on how to start them running.

Dave
 
OK, so I wasn't 100% correct in my last post.

I have just downloaded Java on my M1 and got it to run...

I am using the original Logisim V 2.7.1 on Java V 19.0.1 (10.21) on my Mac M1 processor.

The main file is PDP8-LD12.circ and you require the libraries 7400-lib and 74181 that I have included.

The other files (ending in .logisim) are the files that you can load into the internal CORE memory.

The dxxx files are the associated MAINDECs and CHEKMO should be obvious.

I will have to reacquaint myself on how to start them running.

Dave
Thank you Dave. I have downloaded your simulation from Google drive.

The simulation runs a simple 4 word count program, but there appear to be some problems:
  • the Examine button does not show the contents at address zero. Maybe I have to load 7777 instead of address zero.
  • The Acout register does not show the count
I wonder if need to unload the 7400-lib library and manually load your version of it? On startup it asked to locate the 74181 library.

I have not yet figured out how to load the diagnostics or CHEKMO into "core".
 
Yes, you will have to load my modified 7400-lib. As I said, there are a few modifications I had to make.

There is a menu option for loading, unloading and reloading libraries.

You right-click on the CORE memory and then select LOAD and use the file dialogue to locate the file you wish to load.

Don't RESET the simulation after loading something though!

There is an arrow and a hand cursor. They perform different functions.

Dave
 
Mmm ... yes ... and then there was the LD-12 front panel PCB that was rumored as a Christmas gift several years ago ...

Jack,

I could have sworn that I uploaded the PCB Gerbers...

Anyhow - the PCB has now been uploaded along with the current construction manual.

I have the interconnecting cables to make and then it is inserting devices and testing.


Dave
 
Yes, you will have to load my modified 7400-lib. As I said, there are a few modifications I had to make.

There is a menu option for loading, unloading and reloading libraries.

You right-click on the CORE memory and then select LOAD and use the file dialogue to locate the file you wish to load.

Don't RESET the simulation after loading something though!

There is an arrow and a hand cursor. They perform different functions.

Dave
Simple toggled in programs work as expected including TTY I/O.
I can load diags or CHEKMO into core and verify that the binary images have loaded correctly by examining some locations, however none of the diags or CHEKMO run as expected.

I am still not sure if the 7400-lib I am using is correct. I cannot unload the original one which is automatically loaded, but I can explicitly load the one supplied as 7400-lib.circ as part of the 8/I simulation project. However this means then I have two 7400-lib folders in Logisim. I am not convinced that the correct library is being used.

Nevertheless both Logisim and Dave's simulation of a PDP-8/I are impressive and quite easy to use.

Importantly Logisim very nicely supports "mixed-logic" as described in the "Art of Digital Design".
 
You're right - I also have problems.

Not sure why though. I will have to re-read my old posts and have a little play myself...

Dave
 
It looks like something is wrong somewhere with either the accumulator or the ALU logic (at a guess).

Everything seems OK with d01 up to the CMA instruction. CMA doesn't seem to complement the accumulator for some reason...

I haven't got any time to look into it further now - but I will later in the week. I am not sure why anything has changed on my machine though...

EDIT: I did find an old post of the simulator source and a picture of it running CHEKMO over at #45

EDIT: V0.5 is here: #61

Dave
 
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For an 8/I emulator that's very slow (but highly accurate), here's my Verilog implementation which can be run using Verilator.


The model has been tested on real hardware as well, using a PYNQ board connected to a PiDP-8/I front panel. Of course, synthesizing for an FPGA means accurate timing; way faster than Verilator.

Still have a dream of emulating an Omnibus machine as well as the PDP-12. Maybe someday...
 
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