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Cheapo IDE interface for Model 4p running MM CP/M

We need to get an LDOS expert to look at the hd source code (from that link) to see if they can figure it out. I looked at it yesterday and it looked ok but again I am no expert.

Matt
 
I think you have the interface working given you are getting 80 decimal back from port 47h. We need to find someone with the LDOS assembler to recreate the hd executables you are using ensuring the IDE switch is set to true in the code.

Matt
 
Matt,
I searched until I located the schematics for the Radio Shack 5 Meg Hard Drive. It appears that they are using 74LS244's for the Address Bus and also the other Control Signals.
REF: 5-MEG-HD.png

Would it be wise to follow their lead, and use 74LS244's for the Control Signals and Address Lines versus the Pullup Resistors for both? Just asking.........

Thanks.

Larry
 

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Larry, I think it would be. What this thing is really doing is acting as a line receiver for the TRS-80 side and a line driver for the IDE side.

That is why I recommend replacing the LS04 and LS244 design with a single LS240. This will at least pickup the control lines to the IDE drive and the /EXTIOSEL line back to the TRS80 IO interface. It would be nice to buffer the address lines as well.

The one part about the pull-up resistors the buffers will not provide is creating a known state if the interface is disconnected and powered on -or- when the interface is connected and the Model 4 IO bus is in tri-state (like it is when at power it up and then idle). I probably wont buffer the address lines. They seem to be doing fine with the resistors + there is accidental write protection with the resistors in place.

I need to order some parts from Digikey for another project and at that time I will order some LS240s to mod the interface.

It would be great to keep it at 3 ICs :)

Matt
 
Problem here is that it is working with CP/M with the code Matt modified. If you are going to try to use it with the ide.dsk that is provided in the original project and create a disk from it and then try to use with LDOS or TRSDOS 6 then good luck I can't get it to work at all.

Tried a 2GB CF card and hard drives varying from 80MB to 6GB with no success. Other than checking the status port 47H in which case they all respond properly.

The ide.dsk does have the source code so if someone is familiar with LDOS code please have a look at it. Might be a simple fix to get it working. In the original version of this project the author says to check for 80 or 88 on port 40H which you will never get AFAIK.

Port 47H will give this value. So maybe the code is looking for 80 on port 40h and needs be changed to check for 80 on port 47h? I don't know
 
Not sure, it depends on what the code is doing (and I haven't looked at the code). But the IDE spec states there should be a 10k PU on DD7 and it's used during the drive detection/initialisation process.
 
I found the assembler and re-assembled the formatter found in the IDE.dsk image, HDForm6, with the same results: didn't work. I thought possibly the formatter was not the correct version but it is. I haven't found anything glaring in the source code that would lead me to suspect the source code is at fault.

Still looking.....

Matt
 
I don't really belong here but I may have an insight for yall...

When I rewrote the boot code for my GIDE to use on the 4p, I had to tweak the status results... tho I don't remember right now exactly what I had to change, IIRC there was a bit set that equates to an error in the old MFM result...

... and now that I think about it, I believe it WAS the '8' in $80... which I think I masked out.

Something to look into. :D
 
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I've revised the PCB. I think the logic can be reduced to just 2 ICs - an LS688 decoder, which produces active-low output, and an ACT32 OR gate, which can drive up to 70mA according to the datasheet. Although I've added an LS245 buffer too.

I'm feeding the address match direct to IDE /CS0 and generating IDE IORD and IDE IOW by OR'ing expansion bus IORQ and IN (and IORQ and OUT). This should resolve any timing issues since the IDE device will see the address and chip-select lines before the command. I've also added some additional termination to the IDE header per ATA specs.

Since there was an unused OR gate, I've used it to drive the LED. This should permit a 15-20mA LED to be used even with a CompactFlash card (which will itself provide only 2-5mA). Also IDE key pin (pin 20) is connected to VCC which enables some IDE-to-CompactFlash adapters to be used either without power connected to it, or possibly (I've not tested this) with power connected to the CompactFlash adapter being used to power the TRS-80 IDE adapter.

Schematics, PCB layout, Eagle design files and datasheets in this archive. It would be great if the circuit could be bread-boarded by someone :) (I don't have any TRS80 hardware).
 
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Hmmm Don't have an LS688 but have an LS32 will that do?.

I tried the LS245 on the data bus last night and could not get any valid info back from the IDE drive. Ports 40-47 were all giving me 127 decimal. Should have at least had a 80 on port 47h. Maybe I had something screwy.

I am not committing to building a prototype yet. But might give it a shot once I can obtain a LS688.

I posted this earlier about the 245 problems.
 
Hmmm Don't have an LS688 but have an LS32 will that do?

The LS32 may not have enough oomph to drive *EXTIOSEL. For LS688, you can also used LS520 or LS521 (or HCT varients of any of them).

I don't know why the LS245 didn't want to work. Gate could be held low permanently I guess and DIR connected to *EXTIOSEL (with IDE data bus on the B side).
 
OK gotcha Ok tomorrow I'll run to the electronics surplus and see if they have an ACT32 and an LS688. Probably just tear down my existing board (chips only) and attempt this might take a couple of days. I would really like to see this thing work under LDOS!

The LS245 I had pin 1 at low and pin 19 high so I could use the "A" side as input.
 
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