Cloudschatze
Veteran Member
I can verify just putting in 2mb of ram on an RLX-b results in 1mb at boot.
I believe that the way the memory controller works is that the largest density memory always must be installed in bank 0 or it will be mis detected at the lower density. If I get around to it I will need to desolder bank zero
Here's an additional tidbit of information to deepen the mystery: A9, which I understand is required for the full use of 1Mx4 DRAM chips, is only connected to the four ZIP sockets on the RLX-B motherboard. That is, not to the pads for the SOJ DRAM.
There's an unfortunate lack of information regarding the "286Combo" chip used in the RLX and TL/3 systems. I'm wondering if a particular bit just needs to be flipped or set in the EEPROM to allow 2.5MB operation.
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