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Cromemco Cyclops 88 CCC board set reproduction

nullvalue

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Well I've decided it's finally time to try and reproduce the 88 CCC board set needed for the Cyclops digital camera, in combination with the Dazzler. I know this has come up a few times in the past, and I'm hoping to make some real progress. Thankfully there has already been a reproduction effort done for the Cyclops camera itself: http://wsudbrink.dyndns.org:8080/cyclops/index.html - which I will also be building. But the 88 CCC boards remain equally hard to come by, so I think it's time to tackle this. I'd love to have a working Cyclops exhibit for a future VCF event.

I've started with recreating the schematics in KiCad, and once complete will start work on the PCB's themselves. I'm hosting the files here:

While I know the foils were printed and distributed with the original board set (seen in this listing), I haven't found any copies of them online - so this will be a manual effort. The traces etc probably won't be exact as I'll have to go by photos alone. Unless someone reading this has a set the of original prints..?

Not sure how many will be interested in building the camera & board set - you'll need a working Dazzler as well. But let's use this as a place to share ideas on sourcing parts for the camera itself as well, as I still have a few questions myself... Volunteers are welcome if you know your way around KiCad & want to help out.
 
I can't think of anyone better to do this!

I'll help out with the debugging 😉!

Dave

Thanks Dave will definitely need your expertise when we get into testing!

Not sure if you'd be able to answer this, but for the image sensor on the camera itself, I have not been able to source the MK4008P-9 chip anywhere. Recently I did notice there are similar (different speed) chips on eBay. Looking here: https://www.ebay.com/sch/i.html?_nkw=MK4008P you can see a few MK4008-6 and -7 chips available. Do you think they would work for this purpose? I'm sure this whole setup is highly timing-specific.. but hoping the access time isn't really a factor?
 
I will 'swot up' on the schematic before you get there.

I don't think the access time should be a key factor here - but I will think about this all the same.

Dave
 
Board 1 schematic complete & validated by hand. I have not found a better method than printing out huge like this and drawing lines to confirm each trace side-by-side. I found several small mistakes. The 'poster' print mode in Acrobat Reader is really nice for printing a schematic across multiple (6 ea) pages like this. Would be nice to have a plotter, but this is the next best thing.

PXL_20251208_015432502.jpg
 
Working on Board 2, I've spotted what I think is a mistake in the original schematic drawing. Note how IC 47 has pin 12 show up in two spots.

1765769167779.png

And if 11 is is involved here it should be on the other side, like this:
1765769486599.png
So should this top be like above? 10 < 11

EDIT: and here's another spot I'm confused by, same part - but 9 & 10 are not a pair on the 7405..?
1765771695546.png
 
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Working on Board 2, I've spotted what I think is a mistake in the original schematic drawing. Note how IC 47 has pin 12 show up in two spots.
...

EDIT: and here's another spot I'm confused by, same part - but 9 & 10 are not a pair on the 7405..?
Are you sure that the part is a 7405? BITD there were TI-like parts that used different pin assignments. Not all hex inverters were SN7405.
 
Go with a SN7405 then.

You have to make a decision...

The trouble with early schematics is that IC pin numbers can be wrong.

I have found on some DEC schematics (for the straight-8 for example) the same gate used (apparently) in two different locations (based on the module type, location and pins). Clearly this is wrong... By analysing all the used gates on that module type and location, you may find an unused gate. Clearly, the wrong pins have been used for one of the gates. If there is a separate way of identifying what is wrong, this could be used to fix the inconsistency. If not, then does anyone have a 'real' card that could be used to resolve the inconsistency - or is tossing a coin acceptable?

Dave
 
Yes, I am in contact with Bill S who did the Cyclops camera boards reproductions - he has a real set. I'll see if he can help solve this mystery.
 
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Wow, Bill got back to me quick:

Code:
Corrected partial schematic:

    S-100 BUS                    IC 47 (7405)

18 SDSB (active low) -----------12---o<---13--|
19 CDSB (active low) ------------4---o<----3--|
22 ADSB (active low) -----------10---o<---11--|
23 DODSB (active low)------------6---o<----5--|

As you suspected, that schematic for the driver circuit for S100 pin 22 was incorrect.  IC 47, pins 3, 5, 11 and 13 are tied together.  This 7405 is being used as an open collector bus driver, part of the DMA (or bus mastering, or bus hijacking (as Dr. Walker liked to call it)) system.  When the CCC starts to receive image fields, it immediately dumps them into RAM.  There is no time to involve the CPU or any other circuitry.  "Yanking" these signals should "tell" everything else to get off the bus.  The Dazzler does a similar thing.

Bill
 
Ok here's something that keeps throwing me.. why do these schematics show some of the 7475's with VCC & GND on pins 16 & 8? When all datasheets show they should be on pins 5 & 12..? In the screenshot below you can see both variations.. Why??

1765941579922.png
 
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Because whoever drew the schematics did not check, and who verified the schematics did not check either...

You are now finding original sin...

Either that, or the schematics were either deliberately released with errors, or erata sheets / later revisions of the drawings were issued subsequently that we don't have.

I was reviewing some drawing a couple of months ago for some equipment we are getting remanufactured from 35+ years ago. The connector pinout was incorrect as shown in the manual.

Apparantly it has been like that for all those years! I did ask one of our technicians to double-check to make sure the connector was physically wired 'correctly' (as per our existing units) and not as per the manual - and they were.

The manufacturer has now corrected their error...

Dave
 
Ok almost done with the board 2 schematic but I have this weird issue with the Port Select jumper section. It uses an 18-pin DIP footprint.

Here is the relevant section of the schematic (but feel free to check the full thing):
1766036827282.png

I just see 6 "switches", so using 12 pins total? But when reviewing photos of the board, I think I see traces to all of the pins - so I must be missing something. See my J35 below. I may have this hooked up totally wrong.... Help?

1766036985229.png
 
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I just see 6 "switches", so using 12 pins total? But when reviewing photos of the board, I think I see traces to all of the pins - so I must be missing something. See my J35 below. I may have this hooked up totally wrong.... Help?
Each SPDT switch requires three pins, it has two input choices (inverted and non-inverted) and one output choice, thus 18 pins total. If you intend to use a jumper block with 2-pin jumpers then arrange the header as 3 columns of 6 pins each. Output is the center column; a jumper is either "left" or "right" on each row to select inverted or non-inverted. This may not be how the original board looked/worked mechanically but it's how a modern PCB would likely be designed. If nothing else it will help you get the schematic right :-}.
 
Agreed. The switches are 1 pole 2 way and accept the address pin on one input and the inverse of the address pin on the other input. The switch then selects which of the inputs (normal or inverted) to appear on the output.

6 [switches] * 3 [pins per switch] = 18 [pins].

Dave
 
Each SPDT switch requires three pins, it has two input choices (inverted and non-inverted) and one output choice, thus 18 pins total. If you intend to use a jumper block with 2-pin jumpers then arrange the header as 3 columns of 6 pins each. Output is the center column; a jumper is either "left" or "right" on each row to select inverted or non-inverted. This may not be how the original board looked/worked mechanically but it's how a modern PCB would likely be designed. If nothing else it will help you get the schematic right :-}.

Ah that will make make so much more sense. I will at least create the schematic like that, but will map the pins to the original DIP-18 footprint. Thanks!
 
Ok I think this should get the job done. Kicad had a "DPDT x2" symbol which I will map each to a DIP-6 footprint and should mimic the original PCB layout. When we get to the build phase I'll probably need a hand with wiring this correctly for the right port, since the pinouts for these pads will likely differ from the original.

1766104975493.png
 
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