daver2
10k Member
Looking at the datasheet for the MK4008 and the ACC-1 schematic, a '0' is written into the cells of the DRAM to 'precharge' the array. Din (pin 11) is wired to 0V/GND.
I assume somewhere within the circuitry between Dout of the DRAM and the DMA buffer, some sort of logical inversion takes place - because the Cromemco software assumes a '1' is an illuminated pixel.
I see that a couple of X addresses are swapped over (pins 14 and 15) and inverted as they flow from the CD4040 counter. This (I assume) sorts out the 'strange' logic with the DRAM to present a coherent 32x32 output matrix.
The data output pin is NOT TTL compliant (according to the data sheet I was reading). The data sheet suggested using a TI 75107 to convert the 4008 output into a TTL level. Possibly better than the transistors used on the original?
Dave
I assume somewhere within the circuitry between Dout of the DRAM and the DMA buffer, some sort of logical inversion takes place - because the Cromemco software assumes a '1' is an illuminated pixel.
I see that a couple of X addresses are swapped over (pins 14 and 15) and inverted as they flow from the CD4040 counter. This (I assume) sorts out the 'strange' logic with the DRAM to present a coherent 32x32 output matrix.
The data output pin is NOT TTL compliant (according to the data sheet I was reading). The data sheet suggested using a TI 75107 to convert the 4008 output into a TTL level. Possibly better than the transistors used on the original?
Dave