So, you corrected an error on one board, but on the second board, you further modify the design to allow people to choose between 'as produced' or 'as designed' behavior?
That could be confusing when you have people developing new code for 'as designed' behavior but you have people with boards set for 'as produced' mode.
I almost wonder if it would be possible to 'hide' the correction, the only clue being an 'apparent' extra trace by circling around pin 9 to reach pin 7.
Or I could just be rambling on about nothing.
The main schematic errors on board 1 was not showing the 560R resistor connected to the correct circuit point and two missing dots on the schematic where wiring lines cross that should be connected but were not. It was obvious because there are a pair of IC's with their inputs connected, but they were both not connected to any IC outputs. (This is the kind of thing the DRC in Kicad knows nothing about and could never detect, it is only detectable by noticing the input-output anomaly or by examination of the original foils)
The thing with this unexpected board 2 "error" where the schematic looks ok but the foils not, I am somewhat conflicted about it myself. I would in fact be happy with a replica of what Cromemco did, because that is "how they did it" at the time and we know it worked (Of course the purpose of analysing the foils was to find and correct errors in the documented schematics, I did not expect to find what appears to be a reverse example, a foil error)
I suspect that the effect of it would be merely to disorganise the grey scale order but only in a least significant bit way, and it must not have been very obvious, or somebody would have spotted it at the time.
But somehow I know that when I get it all running (When that happens!) curiosity will get the better of me and I will want to see what happens with it running the way their schematic was wired vs runnng the way they made their pcb.
So what I decided to do in this case (attached) was add a few extra pads and have a pair of links, one with the original wiring and the other with the fixed wiring to correspond with the schematic, so I can then examine the camera image in both cases and decide what to do about this, if anything. At the moment I am not 100% certain about the effect on the image of this unexpected foil error, but I'm guessing it cannot be enormous.
Aside from some gate and IC pin numbering errors, there was only one schematic error on board 2 where the foils did not match the schematic, involving one gate that drives the output terminal PR OUT, but unless the option terminals "PR IN & OUT" were linked, it would have no effect at all. And all historical board 2 photos I have seen, the PR IN & OUT are not linked, so it is academic probably.