Ok. I've always wondered what kind of performance improvement memory cache did in the era of MOS memory. Back with core it was a massive difference but I've wondered about MOS.
The 1MB MOS memory in the 11/44 MS11-P has a read access time of 500ns or so. Core memory was usually about twice that in the 1000ns range.
I am not aware of core being a supported option on the 11/44. It is on the 11/04-34 systems in the BA11K box with the configurable regulators.
With the cache, the memory access time goes down to data arriving at the end of the current CPU microcycle, so basically a 0ns additional delay.
The cache helps when the data in the cache is used more than once, so instruction loops, or data that is read/written multiple times in a loop get the benefit.
Some caches, like the 11/70 in particular, also benefited from prefetch, as it had a 32b path to memory so any cache fill on the PDP-11/70 would prefetch (usually)
the next word, so processing instructions or data sequentially benefitted significantly.
The 11/34 and 11/44 caches have only a 16b wide access to memory (ie, the UNIBUS) so there is no inherent prefetch by these caches. So no help there.
The caches only help when a given memory word is used more than once before it is replaced in the cache.