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Hacking a Canadian video titler

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ClassicHasClass

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I teased @NeXT with this earlier, so here it is. The Scriptovision Super Micro Script comes all the way to you from beautiful Montreal, designed and built in Canada from 1985 to at least 1989. Sold as a prosumer video titler/character generator with a built-in genlock, it turns out to have a 6802 (6800 with internal RAM and oscillator) and 6847 VDG, and with a little work figuring out how the ROMs were scrambled, it is very hackable. I also wrote up a MAME driver in the process so I could understand the hardware. At the end we'll have a new custom ROM, a way to send programs to it over a serial port, and a few sample programs to run. It's almost a Tandy MC-10, but don't tell Radio Shack.

oldvcr.blogspot.com

The Scriptovision Super Micro Script video titler is almost a home computer

Canadians, rejoice! Not only do you have curling, the Big Turk and Tim Hortons (and, when I was in BC last, Dr Pepper made with real cane ...
oldvcr.blogspot.com oldvcr.blogspot.com
 
ClassicHasClass said:
It's almost a Tandy MC-10, but don't tell Radio Shack.
Click to expand...

It's kind of remarkable just how long the legs were on the 680(x)+6847 combo. There was a dingus for the TRS-80 Model I made by Percom call the "Electric Crayon" that predated the TRS-80 Color Computer by about a year that was just a single-board 6800+6847 single-board computer programmed via a parallel port, and it's essentially just these same guts. (In 1979 Motorola was offering a dev board called the "Micro Chroma" that appears to have been the great grandaddy of all of these things.)

One observation, though, about your article:

Because the VDG and the CPU must access the same RAM for display, there is an inevitable risk of collision, even with CPUs like the MOS 6502 that are off the bus for much of their machine cycle. Unlike systems like the Tandy Color Computers, the Micro Script has nothing like the 6883 SAM to arbitrate between the CPU and the VDG; the Micro Script's small 2K ROM instead keeps its working data and processor stack in the CPU's internal RAM, only using the 2114 SRAMs for storing characters and semigraphics for display. Two 74LS367 tri-state hex buffers and a 74LS245 octal bus transceiver serve as bus arbitrators, protecting the 6802 from the 6847's bus activity and suppressing the VDG on its MS pin when the CPU accesses the SRAMs (gated via a 74LS138 used for address decoding). Although the MC6847 can generate a signal on its FS pin when it finishes drawing a frame, which in many systems is wired to the CPU's interrupt line, here the CPU's halt, IRQ and NMI (and memory ready, incidentally) lines are all hardwired high. Instead, the 6847's FS line runs to one of the 74LS367s and then to the data bus which the CPU can busy-read as a single bit. The Micro Script's ROM constantly checks this bit, waiting for the precise time it goes low, after which the CPU is guaranteed 32 scan lines where the VDG will not interfere. This period equals 32 times the NTSC horizontal scan time of (1/(13500/858)) milliseconds (~2.03ms), or approximately 440 cycles at the MC6802's clock speed. This number will become important later.
Click to expand...

The role of the SAM in the Color Computer is... complicated, but FWIW you *can* do "transparent* sharing of the bus between a 6847 and a 6800/6502-style CPU without it. (Arbitrating memory access is just one of many things the SAM does; it's also a memory pager, dynamic memory refresh controller... etc.) The 6847 is normally clocked at colorburst rate (3.58Mhz), but its actual "character rate", IE, the rate at which it needs to fetch memory, is only a quarter of that even at its highest resolutions. For an example of this we can actually look at the MC-10; if you look at the MC-10's schematic there's a chain of flip-flops that divides down the 6847's input clock into the ~0.9Mhz clock that's fed into the CPU, and with the help of a couple latches the system can arbitrate access to the SRAM in the system without the CPU needing to worry about it or be wait-stated...

That said, it looks like something that clever was pretty rare; both the "Micro-Chroma" and the Electric Crayon used separate blobs of memory for the VDG and the CPU and various techniques for avoiding contention on screen access. Kind of funny how Motorola was *this* close to having something that could have done the seamless sharing (at least with SRAM) with no glue but whiffed it.
 
On this system you'll get 'snow' if you muck around with the video RAM while the VDG is trying to draw, which can be seen best when vertical scrolling since that involves a lot of memory moves, likely the MS pin getting triggered by the 74LS138.

I did mention the MC-10's situation later on. It has a 74LS245 gating this if I read the schematic correctly. The Micro Script and Super Micro Script don't seem to insert wait-states on the CPU either; the factory ROM is very disciplined about when it accesses memory.

I'll have to look into that Micro Chroma device you mention though - the original Micro Script may well be a simple riff on it.
 
ClassicHasClass said:
I did mention the MC-10's situation later on. It has a 74LS245 gating this if I read the schematic correctly. The Micro Script and Super Micro Script don't seem to insert wait-states on the CPU either; the factory ROM is very disciplined about when it accesses memory.
Click to expand...

The ‘245 is just a bidirectional buffer that cuts off whatever’s asserted on the 6803’s AD lines from RAM when it doesn’t own the bus; the “secret sauce” is the chain of 74LS flip flops that sync things up so the VDU’s memory access (which only requires one tick out of four of its 3.58mhz clock) lands on the right phase of the CPU’s slower clock (which it’s also the divider for). IE, it basically does what the SAM’s internal state machine does.
 
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