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Hazeltine 1500

Gary C

Gary C

Veteran Member
Joined
May 26, 2018
Messages
2,772
Location
North Yorkshire, UK
Got my hazeltine terminal on the bench and its a bit sick.

The monitor wasn't working but that was a simple fix, its the logic board thats not running properly.

On RAM chip pulling down an address line was easy to sort, but while there is lots of activity, the databus is not right

1754817809881.png

D2 on the CPU side to the bus driver is like this for example. Its almost running though.

Probably try replacing the bus driver first after a good clean up.
 
Damn !!!

U22 which appears to be a mask ROM is missing two legs. One could be soldered, but the other has cracked right back at the case !

Bugger

Does anyone have the contents of the two roms in the Hazletine 1500 with the DTD155246 board ? It looks like I can re-jumper the board for 2716 eproms.
 
Might have read the first ROM

As the chip selects are programmable, it doesn't quite match a 2716 EPROM, but with legs tacked back on and pin 21 pulled down I seem to have got something.

I have found the file for a 1510 and its U22 starts
21 85 37 36 00 C3 F0 0E E5 F5 21 91 37 3E FC A6 79
and my download
21 85 37 36 00 C3 90 08 E5 F5 21 91 37 3E FE A6 77

So I am reading it, and the matches seem to indicate no bit errors I think (ie F0 and 90 differ in the top nibble by bits 6 & 7, whereas 0E and 08 differ in bit 0)

But still, it would be nice if someone has the ROM dumps for the 1500 ?
 
There are two boards for the 1500, one is a universal board for the 1500,1510,1520 etc the other just does the 1500 and doesn't have the same ROM's.

Mine is the universal board. I suppose I can try the 1510 software (which I have) but the keyboard isn't the same.

Really need someone with a 1500 using the universal (DTD155246) board to dump the ROM's
 
2716 EPROM's programmed (fingers crossed the contents are correct)
Jumpering was fun

The manual very helpfully shows the jumpers needed for the 8316 and the 2716. R11 and R90 need removing and R9 and R7 need adding, but where are R9 and R7 ?. The PCB has no markings and the manuals helpful component location diagram doesnt show the location of the new ones.

Some tracing of tracks and I have found some unmarked solder pads from +5 to pin 21 on both sockets so I think thats right now
1755160693840.png

Fitted a new 8228 and powered it up with the monitor attached, and it still doesn't work. The databus is still as bad as ever. Something is corrupting it so its the long slog of removing components until it clears up I think.
 
Still not working :)

So working through anything connected to data line D1, I find that pulling the UART restores it to a reasonable 5V square wave.

So a new UART is required. Something common happened as both RAM chips connected to D1 and a BCD decoder were also faulty.

New one on order, fingers crossed.
 
New UART obtained and the data lines are all about the same but show marked capacitance on their transition from 0 to 1, so unless they are when the bus goes high Z, there is something common to all lines that is affecting them. Starting to think it might be the 8080, but next line of attack is to write some simple code just to access ROM and toggle the I/O write line (so that I can see if its reading the ROM without introducing any other component, it will also prove I have the jumpers set right), then to access RAM and step through it all doing a read/write of alternate bits. If that doesn't work I will try a new 8080 with every component on the data bus removed apart from ROM & RAM

Fighting me all the way
 
First draft of diag ROM written.

Its set to write 55 then AA to every RAM location from 3000 to 37FF, then if either are not correct, to toggle the I/O write line four times, then four NOPs then toggle I/OW again four times. When run, I just see repeated four pulses, a gap then four pulses. Seems like every memory location is bad :),
Modified to toggle the I/O read line if it sees a good one, and yep not a single good read from RAM.

What is odd, the upper 1K of memory chip selects toggle twice every few seconds compared to the lower 1K which is showing expected very frequent chip selects. Don't think its a program issue but I will check.

At least the data bus if good enough to read from the ROM without error, so its something on addressing the RAM
 
Given the board a really good clean and it seems to have become much more stable. Next step is to socket the RAM's then jumper the sockets with a pattern before to check the read function, then start putting RAM's back in.

Chip enable, RW and the databus seem to work somewhat but are really noisy. Adding a 1K pullup really improves the signals. Not sure if its a fault or a design 'feature', I have certainly see really poor looking waveforms that still work.
 
Not enough sockets (only had one on stock !), so I put one in and knocked a quick program just to test bit 0 and toggle IOR if it passes and IOR if it fails then went through every RAM chip and found 3 defective ones.
I am going to socket the RAM's so new chips and sockets on order.
Still not sure why the databus and the CE/RW lines are so poor, but they seem to work. Not sure if its worth putting a pullup array in.

.CPU 8080
RESET EQU $0000 ;reset vector and start of ROM
MEM_START EQU $3400 ;start of upper RAM
MEM_END EQU $37FF ;end of upper RAM

.ORG reset
START:
LXI H,MEM_START
DCX H
BEGIN:
INX H
MVI D,%00000001
MOV M,D
MOV A,M
ANA D
JZ ERROR
IN ($FF),h
MVI D,%00000000
MOV M,D
MOV A,M
MVI D,%00000001
ANA D
JNZ ERROR
IN ($FF),h
MVI A,$37
CMP H
JNZ BEGIN
MVI A,$FF
CMP L
JNZ BEGIN
JMP START
ERROR:
OUT ($FF),l
OUT ($FF),l
JMP BEGIN
 
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