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Help getting a PET 4016 running again - for a beginner!

In order to implement a "soft reset" button, wire your normally open push button (one that works) in series with your 330 Ohm resistor.

Connect your button circuit across capacitor C50 (0.1 uF). This capacitor is responsible for the power on reset.

One side of capacitor C50 should be connected to 0V and the other end should be connected to a pull-up resistor and the 555 timer IC.

Pushing the button should discharge the capacitor and initiate a reset.

Turning the PET off and on is not a smart thing to keep on doing as you can cause further faults!

Dave
 
Let's look at the CRTC (UB13) next.

Pin 21 (/CLK1) should have a constant 1 MHz clock on it.

There should also be activity on pin 22 (BR/W).

Pin 2 is an active HIGH reset signal. Push your manual reset button and you should observe this signal go HIGH.

Pin 25 is the active LOW chip select signal. Just after you poke your manual reset button, you should observe 16 (or so) pulses on this pin. Single shot trigger your oscilloscope on the reset signal whilst monitoring pin 25.

After that, we need to look at the following pins to see if there is any activity at all: 18, 4 to 13, and 34 to 40.

Dave
 
Thank you! ⭐

I'm a little worried that my experimentation has done something to the PET, or that it was on its last legs to start with. Most of the time, now, upon turn-on or reset, the SYNC signal stops after less than a second, and stays low. I tried the soft reset a bunch of times (which works a treat, thanks!) but the SYNC would always stop after the same amount of time. The only way I can seemingly reliably get the CPU to keep working continuously is if I turn the machine fully off, wait a minute or two, and turn it back on.

Still, it's working for now, so onwards we forge!

CRTC
Pin 21: 1MHz clock as expected
Pin 22: Regular activity, seems to repeat three pulses in a repeating pattern:
CRTC pin 22 (cropped).png
Pin 2: I got quite confused here, as you said "active high reset signal" so I assumed that meant "when it goes high, the CRTC resets". I thought I'd solved the problem then, because this pin is always staying high, and goes low for a few seconds when I press the soft reset before going high again. But then I read the schematics, and used the continuity detector on my multimeter to check, and found that the reset pin of the CRTC is hard-wired to the reset pin of the 6502, and they're both /RESET! So I misunderstood you. But yes, the reset pin is working as intended!

Pin 25: Here is where it seems to diverge from the expected behaviour.
I set it to trigger on the /RESET returning high, as you said, and:
index.php

...no pulses. (Pin 2 on top, pin 25 on bottom.)
I zoomed in a little on that noise that starts after the reset, and it's not very illustrative:
CRTC pin 25 (4).png
Just noise for a millisecond or so.

I'm thinking this may be a thread to pull on? The schematics show this pin as being fed by three inputs NAND-ed together:
1724793093311.png
I'll explore those three inputs now, and also check the rest of the CRTC pins you mentioned for good measure.
 

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Well done on seeing the 'double /RAS'...

Don't forget to LIKE my posts if they are helpful.

I was wrong about the RESET pin on the CRTC. It is active LOW (i.e. it should be normally HIGH, then go LOW when it is reset, then go HIGH again). I would usually identify my signal on the schematic pin of the CRTC as /RESET (for LOW to reset) and RESET (for HIGH to reset). Commodore have identified the CRTC pin as RESET - but it is driven from the signal /RES so, in my mind, confusing. And I have probably confused you even more...

You might want to slow down the oscilloscope timebase a little bit. I would have to re-read the EDIT ROM listing to see exactly what goes on after a reset. Just checked. Is it 'chiming' after a reset? There appears to be a lot of activity to initialise the I/O hardware before it initialises the CRTC.

Perhaps (in that case) consider triggering the oscilloscope from a HIGH to LOW transition of the CRTC /CS pin instead? See if it even triggers...

You may have to hold the manual reset pushbutton for a while so that the 555 timer can discharge the larger capacitor before releasing it to get a reliable manual reset?

The 'going into the weeds' (i.e. the SYNC pulse stopping) could indicate a ROM or RAM problem.

Dave
 
Okay, the three inputs to that NAND gate are these three:
1724793617380.png
I'm at a bit of a loss as to what they represent, though.

The one labeled "/I/O" is connected to a pin we've measured earlier; pin 16 on UE12, which you said indicates activity in the EDIT ROM ($Exxx), but I don't see why accessing the EDIT ROM would also be accessing the CRTC?

The one labeled "x8xx" is a little weird, but since it's connected to BA8,9,10,11 from the address bus with those logic gates there, I'm inferring from the name that it goes high whenever the selected address has an "8" as its second hexadecimal digit?

Combined with BA7 being a direct input to the CRTC's NAND gate, then, I suppose the CRTC is selected (i.e. the NAND gate outputs LOW) whenever:
  1. Any address is selected in the range $x880 - $x8ff (weird that the first digit doesn't matter)
  2. The /I/O input is LOW.
Ahh... I see now that the /I/O input is itself driven by the UE12 decoder, which is in turn driven by some of the other address bits. That's clever! So that's how it maps certain areas of "memory" to other things (I'm assuming this is also how it talks to peripherals and things like that).

Thanks for the reminder, I'll make sure to LIKE your posts, you've been incredibly helpful!

I'll see if I can get the CRTC's /CS to trigger at all, but it may require a bit of finagling! Back in a tick.
 
The EDIT ROM actually occupies the address range $E000 to $E7FF.

The I/O area starts at $E800.

Later PETs (notably international ones) had a larger EDIT ROM - and there is a 'hole' in accessing the larger EDIT ROM for the I/O devices...

>>> Ahh... I see now that the /I/O input is itself driven by the UE12 decoder, which is in turn driven by some of the other address bits. That's clever! So that's how it maps certain areas of "memory" to other things (I'm assuming this is also how it talks to peripherals and things like that).

Exactly. The fully-qualified address decoding for the CRTC is 1110_1000_1xxx_xxxx (in binary).

You can see the PET memory map here: http://www.6502.org/users/andre/petindex/progmod.html. The I/O page addresses SHOULD be restricted to 256 bytes so the I/O addresses should map between $E800..$E8FF.

I am off to bed...

Dave
 
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Try as I might, I can't get anything to happen on /CS. Tomorrow I'll see if I can trace that problem back to one of the other inputs, but now I'm also off to bed. Appreciate you answering me so late!
 
Alright! So, at the moment we're trying to figure out why the CRTC chip select (pin 25) is never getting activated (active LOW). We figured out that it is set by a 3-input NAND gate, which is fed by:
  • UD15 pin 18 (BA7, i.e. bit 7 of the buffered address bus)
  • UE14 pin 8 (labeled "x8xx", this goes HIGH whenever the selected address follows the pattern $x8xx)
  • UE12 pin 16 (labeled "/(I/O)", this pin goes LOW whenever the selected address follows the pattern $Exxx).
    • This signal is fed into the NAND gate through an inverter
All the above tells us that:

CRTC pin 25 = NOT ("BA7" AND "x8xx" AND "I/O")

i.e. we expect the CRTC to be selected when the address is in the range $E880 - $E8FF.

@daver2 has said that there should be a "chime" (i.e. some activity) on CRTC pin 25 shortly after a reset, but I've managed to confirm that this doesn't happen (setting the trigger to a CRTC chip select falling edge, and it never triggers).

I connected the oscilloscope to the three inputs that feed CRTC chip select, and discovered that there is actually lots of activity on all three of them after a reset. However, for some reason they never line up, meaning the CRTC never gets selected. Take a look at this:
Annotations1.png
The topmost signal is the CPU's SYNC pin, which I use as a sanity checker (and used as the trigger here).
There's a flurry of activity on BA7 straight after reset, then BA7 stays HIGH, x8xx stays LOW, and /(I/O) has a bunch of activity for just over 1ms.
I inspected the activity closely after this, but basically all the signals miss each other, never lining up to trigger the CRTC select.

Here's detail on the section at 1 grid square to the right of the centre on the above plot (each gridline is 200us):
Annotations2.png
The purple line through the middle is just a little helper from the scope, it computes the logical AND of BA7 and x8xx. They are never accessed at the same time (I searched outside of this view as well), so it's never accessing anything in the range $x880 - $x8FF.

So... is this a problem with the ROMs, then? It's clearly churning away happily, but choosing never to send any data to the CRTC. Maybe somebody has modified the EPROMs with something else that never outputs to the screen? But I'd be very confused if someone did that intentionally. It's just strange that the computer does seem to be doing quite a bit of activity without ever trying to put anything on the screen.

(Also, quick question: does the CRTC require chip select to go LOW for it to output HSYNC and VSYNC pulses? Because my CRTC is never outputting those pulses, but I don't know if that's a sign of a defective chip or just that it's never being told to output anything.)

So, I'm not sure what the next step here is! What would your guidance be? I've done some snooping online, and it seems it is possible to wire up a Raspberry Pi to program EPROMs, so let's assume I do have the capability to do that (even though it may take a bit of effort to set up, but that's mostly a software problem, and software is my day job!)
 
Sorry, you misunderstood what I said. The 'chime' is the audio sound the PET should make on startup from the sounder, and has nothing to do with the CRTC at all.

The EDIT ROM outputs the chime noise BEFORE it programs the CRTC (so many, many CPU instructions after a reset condition).

The CRTC needs to be programmed in order to generate HSYNC and VSYNC, along with all of the other signals.

Do you hear the chime at all?

 Dave
 
Ah, I see! I assumed "chime" was the name for a specific handshake signal or something. No, there's definitely a piezo buzzer inside the computer, but at no point in all my pokings around has it ever made a noise!
 
This is purely a guess here - but an educated guess...

Either one (or both) of the 6520 PIA (UB2) or 6522 VIA (UB15) have gone or (more likely) you have a RAM fault.

The initialisation code involves the use of subroutine calls and returns. These will fail if the stack (RAM in the range $0100 to $01FF) is faulty. This means the lower bank of 16K of DRAM. It is possible that the particular failure mode is causing the firmware to go into a loop - executing some code - but not the correct code.

There is a little 'trick' to swap over the two 16K memory banks, involving a little bit of soldering.

Realistically, you need a copy of my PETTESTER ROM.

Dave
 
If you want to try the 'swap RAM banks' trick...

Identify the following gates and resistors:

1725270700215.png
Disconnect one end of each resistor and cross-wire the free leads of the resistors to the alternate pads.

1725270948499.png
This should swap over the banks of RAM.

Of course, both banks of RAM could be faulty...

Dave
 
I'll try all the above. I've also gone back through the previous posts, and one thing I haven't done yet is attempt to clean the white IC sockets in case the contacts are bad. You said I can use something called DeOxit for this?

Looks like it's also time to get myself a new soldering iron! I knew we were edging towards this, but it's nice to have a proper excuse now.

Yes, looks like I'll need that - you mentioned 2716 EPROMs. If I manage to get hold of a 2716 and program it, would I be able to load your PET TESTER onto it myself, or will I need to come to you (or vice versa)? Also, where can I get 2716s, or are there more easily available alternative chips?

I'm over the 10 post limit, so my DMs are open now. I've just been posting on this thread just in case someone else ends up needing to go through the same troubleshooting tips!
 
You will need an EPROM programmer capable of programming the part and some means of downloading the HEX or BIN file to program it with.

There are UK companies that can program a part for you (if you give them the file). They may also be able to supply the part.

DeOxit is the best stuff for cleaning IC sockets.

Dave
 
ROM stands for Read Only Memory. You can't 'program' them... They are manufactured at the plant and that is the end of that.

PROM stands for Programmable Read Only Memory. You can (generally) program it once. After that you cannot erase it and reprogram it.

An EPROM is an Erasable programmable Read Only Memory. These have quartz windows and can be erased with strong UV light and reprogrammed. But, you require an EPROM programmer to do this...

However, most of your devices will (likely) be ROMs.

The only device that may be an EPROM will be the EDIT IC. However, under no circumstances would I ever erase and reprogram an existing device...

Someone did this once - and never recovered the machine again. We think it had 'special' programming and the machine was (potentially) unique... Not that I think your machine is though.

Dave
 
The GQ-4x does a good reliable job on programming the 2716 and other vintage Uveproms such as the 2532 and 2732 and many others used in vintage computers. It comes in a good housing and links to the host computer with a USB cable and has an easy install software driver on a CD. It also does many Dallas NVram parts and FRam too. It has a very extensive supported device list.

It costs just a little more than many of the bare pcb programmers, but these are begging to get shorted out on the desk, unless you make a housing. The GQ-4x is also a non-buggy system, with excellent support from the manufacturers too. I'm confident it has negligible bugs using one for a few years now, because bugs, if they are there, find me like Bees on a Honey Pot.

When getting 2716's try to find unused early date code parts. There are many refurbished parts out there and you don't know what past traumas they have been subjected to, and also getting NOS parts, they will be unprogrammed and you won't have to use or need an eraser unit.
 
I am in work today, so I have acquired my tube of guaranteed unused Intel D2716-1 NOS devices. I even have the paperwork to go with them!

If you are going to purchase an EPROM programmer - I will be quite happy to send you one in the post (free of charge).

Dave
 
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