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Is the PET killer poke really a killer?

fachat

Experienced Member
Joined
Apr 24, 2010
Messages
125
Location
near Heidelberg, Germany
Hi there,
there is a discussion going on on twitter about how the killer poke works and whether it actually "kills" PETs. There's actually video footage available now!
https://twitter.com/AkBKukU/status/1249828043289268224

So, I'm looking for help on this forum, on
  • any (even anecdotical) evidence where the killer poke has been observed and what damage it did
  • someone who has deeper knowledge on CRT electronics who could explain what the observed signal change could cause

Thanks!
André
 
Hi Dave,


Many thanks for pointing to my article :)

In the twitter thread we are looking further than this. You may have noticed that in my article I described that some signals change and then kind of "wander off" into speculation what that could do to the CRTs flyback coils. Now we are further looking into what would really happen.

André
 
Hi Andre.

Sorry, I didn’t think it might have been you yourself! I should have checked the poster more carefully shouldn’t I? I’ve just woken up...

I got distracted by a copy of Forth for the PET yesterday. You’re going to distract me with this today aren’t you :)!

Dave
 
There was a PET monitor repair thread that I contributed to on VCFED not so long ago that had an excellent description of the way that the 'modern' (8032) monitor circuitry works. It did cover damage to the monitor by changing drive signals...

I will look it up sometime today and see whether it applies to this specific issue.

Dave
 
I have failed dismally to find the post I was looking for.

I think it was posted in the Commodore section as a PET problem. If memory serves me correctly (and sometimes my DRAM fails to retain the bits these days) the thread may have been created by ilpaninaro and the post was definitely by Hugo Holden.

What Hugo doesn't know about the PET monitor is not worth knowing :)!

Perhaps his memory is better than mine - or he can recreate his thoughts here for you?

Dave
 
I have failed dismally to find the post I was looking for.

What Hugo doesn't know about the PET monitor is not worth knowing :)!


Dave

Ha ha, nice of you to say Dave. But I have never owned a PET computer or monitor, yet alone worked on one myself.

However, I am very familiar with television and video monitor technology and the Physics of scanning systems, the circuitry involved, the energy considerations and the potential risks to the components in these systems.

Most of the work on the Physics of deflection systems (of the post war electromagnetically deflected types) was done by Otto Schade at RCA research labs in the 1940's, I have all of his original papers. The idea of energy recovery H scanning was thought of by Alan Blumlein, the inventor of stereo audio and a wartime Radar researcher, in the UK.

In the world of television receivers, the H & V sync signals presented to what would be the "Video Display Monitor" part of the TV system could just be noise (eg off channel snow) so the designers of such video monitors (at least that part of the TV set call the video monitor) realized that the H & V scan deflection systems , especially the horizontal deflection, which also is used for EHT generation, must run independently of the source video signal's H sync, and simply sync lock to that sync pulse.

However, oddly, when computer designs with integral video monitors cropped up in the late 1970's, the designers decided to ignore that "TV" design philosophy and have the "scan time-base signals" for the H scan system, derived directly from the computer itself, without an independent H scan oscillator. The IBM5151 monitor being a typical example. It was a small shortcut that only avoided about three transistors a few capacitors and resistors, but the effects of it on vintage computers were fairly significant.This has been borne out in later years as the computer circuitry malfunctions, putting the VDU in jeopardy.

The basic problem is that the time that the horizontal output transistor is turned on for is quite important.. It not only defines the width of the scanning raster (the peak horizontal yoke current) but it also defines the EHT voltage. If there is an abnormality in the drive waveform, specifically the duty cycle and "On time" for the H output transistor(HOT) is too long, the peak collector voltage on the HOT can exceed the transistor's rating, destroying the HOT and or the EHT rectifier diode can fail.

So, if on a computer it was possible, with a software manipulation, to directly manipulate the H drive signal that was fed to a monitor, where the H drive signal was responsible for directly controlling the HOT (as it is the PET VDU's), you can in fact damage the HOT or cause the output stage/EHT rectifier to fail. Often if the HOT fails, it takes out the driver transistor and/or overloads the power supply, possibly causing damage there too, depending on the design.

In monitors (VDU's) that have an independent H scan oscillator, they are immune from this sort of damage.

Hugo.
 
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Hallo Hugo,

many thanks for chiming in! We are currently discussing the PET killer poke in this twitter thread, where you can actually see the changes that the "software manipulation" does to the vertical drive signal: https://twitter.com/afachat/status/1250182893328007170?s=20
It would be great if you could comment on that!

Our current assumption is that the changed signal holds one of the drive transistors Q651 or Q652 into the power dissipation zone (between fully open and fully saturated) for too long so it overheats and breaks.
What do you think?

André
 
Hallo Hugo,

many thanks for chiming in! We are currently discussing the PET killer poke in this twitter thread, where you can actually see the changes that the "software manipulation" does to the vertical drive signal: https://twitter.com/afachat/status/1250182893328007170?s=20
It would be great if you could comment on that!

Our current assumption is that the changed signal holds one of the drive transistors Q651 or Q652 into the power dissipation zone (between fully open and fully saturated) for too long so it overheats and breaks.
What do you think?

André

Andre,

While its easy to damage the H deflection stages with the wrong timing drive signal, its much more difficult to damage the vertical deflection stages and vertical output stage. The reasons for this are:

The vertical deflection output stage is simply a version of a power analog amplifier, which amplifies a sawtooth deflection voltage to become a sawtooth current in the yoke coils (it is actually a trapezoidal wave to allow for the inductive component of the load).

Also the signals here are not used for generating EHT or other auxiliary voltages. For the most part these sorts of class AB power output stages are very resilient and are self protecting in overdrive conditions.(I say class AB because they are biased out of cross over distortion)

For example, if the V output stage was driven into clipping with too high a drive voltage, the transistors saturate, which actually protects them from excessive power dissipation as their C-E voltages are low. So, if they are forced into switch mode, they would actually run cooler.

However, it would be true that if the interface into the drive circuitry, of the drive signal, was DC coupled and was to asymmetrically cause one of the output transistors to come on for an extended period, and the design of the output stage was a split power supply, with no vertical yoke coil coupling capacitor, the current build up in the yoke could be quite high after a time and possibly drag the conducting output transistor out of saturation, causing the junction to heat. However, the fact is, most vertical output stages in VDU's are not like this, they run from a single power supply and the yoke is coupled in with a coupling capacitor, so an extended DC off-set, with one transistor forced into saturation for a long period, is ignored as the couplig capacitor charges and the current falls away.

So what I'm saying is, failure of the vertical stages of the VDU would be very difficult to induce with an abnormal V drive signal, perhaps not impossible.

If you posted the vertical stage and output circuit from the PET monitor you are considering could get damaged by an abnormal vertical drive signal, I could comment on it better.

If it was a real issue, likely then when somebody did the Poke thing, there would be frame scan collapse and a bright horizontal line left on the screen, have you ever witnessed such an effect?
 
Andre,
...
If you posted the vertical stage and output circuit from the PET monitor you are considering could get damaged by an abnormal vertical drive signal, I could comment on it better.

If it was a real issue, likely then when somebody did the Poke thing, there would be frame scan collapse and a bright horizontal line left on the screen, have you ever witnessed such an effect?

Hugo,

thanks, here is a link to a YouTube video with the effect in place: https://www.youtube.com/watch?v=R_EmN1XPpc8
Here is the same but with the screen filled so you better see the distortion (embedded in a twitter post): https://twitter.com/AkBKukU/status/1249828043289268224?s=20

Here is the link to a description and scope shots with and without, and the schematics (embedded in twitter): https://twitter.com/afachat/status/1250182893328007170?s=20
but I will attach the picture to this post as well.
Hm, schematics didn't work to attach, so here is the link to the Commodore Archive with it: http://www.zimmers.net/anonftp/pub/cbm/schematics/computers/pet/8032/321448.gif
[Edit: the scope shots are from TP2 in the schematics]

Thanks again for your help!
André

Service Manual.pngTP2 with POKE-small.jpegTP2 without POKE-small.jpeg
 
In the poke condition, the vertical yoke currents are lower than in the normal run condition with full vertical deflection. I cannot see it is likely the VDU would be in any way harmed by this event, all the currents in the vertical deflection amplifier stages are lower in the poke condition than they are normally. It would be quite different if the scan amplitude increased. So I think its hardly a "killer poke" at all.

On the other hand, if a poke was arranged to upset the H scan stages, and increased the width, for example halving the H drive frequency would do it, now that would be a killer poke.
 
In the poke condition, the vertical yoke currents are lower than in the normal run condition with full vertical deflection. I cannot see it is likely the VDU would be in any way harmed by this event, all the currents in the vertical deflection amplifier stages are lower in the poke condition than they are normally. It would be quite different if the scan amplitude increased. So I think its hardly a "killer poke" at all.

On the other hand, if a poke was arranged to upset the H scan stages, and increased the width, for example halving the H drive frequency would do it, now that would be a killer poke.

Hallo Hugo,

many thanks. That's interesting.

Could it be that this situation drives the driver transistors in a range where it burns more energy and could thus get too hot over time?

André
 
Hallo Hugo,

many thanks. That's interesting.

Could it be that this situation drives the driver transistors in a range where it burns more energy and could thus get too hot over time?

André

I cannot see that as a realistic possibility ,the driver transistors, nor the output transistors will have higher than usual currents in the poke mode, in both will be significantly lower than normal I think.

For some reason I still could not get the Zimmers schematic to load. Do you have another link ?

I may be able to suggest a simple measurement to help prove the point one way or the other.

The great thing about a VDU though, if there is a visible display, it is diagnostic of many things:

The form of the scanning raster tells you about the peak currents in the deflection coils and therefore the deflection systems.

If the amplitude of the scan drops, the yoke peak currents are lower than normal and in the case of a vertical scan amplifier, that means lower in the output transistors and therefore must be lower in any driver transistors. There is the possibility though of a significant DC offset at the output amplifier being masked over by the usual AC coupling to the yoke, however, even in that case, the coupling capacitor charging has reduced the output current, in the output transistors & drivers, to a lower level than normal I would expect.

The vertical scan amplifiers are generally analog amplifiers, unlike the Horizontal scan output transistor which acts in switchmode. This is because of the nature of the load, which is dominantly inductive for the H scan coils so a rectangular voltage drive is required for the H scanning coils for a sawtooth current. However significantly resistive and inductive for the vertical coils, so they require a combination of a sawtooth voltage combined with a rectangular wave (called a Trapezoidal wave) applied to have a sawtooth current for scan and a rapid flyback for vertical retrace.

This is why vertical deflection amplifiers have can have scan linearity potentiometers that alter the analog conditions in them and the shape of the sawtooth voltage.

In H scan output stages, the linearity cannot be adjusted (as the H transistor is in switch mode and its drive wave has no effect on the scan linearity) so instead they have saturable magnetic reactors in series with the yoke and S correction capacitors to achieve a linear scan that way.
 
I cannot see that as a realistic possibility ,the driver transistors, nor the output transistors will have higher than usual currents in the poke mode, in both will be significantly lower than normal I think.

For some reason I still could not get the Zimmers schematic to load. Do you have another link ?

I may be able to suggest a simple measurement to help prove the point one way or the other.

The great thing about a VDU though, if there is a visible display, it is diagnostic of many things:

The form of the scanning raster tells you about the peak currents in the deflection coils and therefore the deflection systems.

If the amplitude of the scan drops, the yoke peak currents are lower than normal and in the case of a vertical scan amplifier, that means lower in the output transistors and therefore must be lower in any driver transistors. There is the possibility though of a significant DC offset at the output amplifier being masked over by the usual AC coupling to the yoke, however, even in that case, the coupling capacitor charging has reduced the output current, in the output transistors & drivers, to a lower level than normal I would expect.

The vertical scan amplifiers are generally analog amplifiers, unlike the Horizontal scan output transistor which acts in switchmode. This is because of the nature of the load, which is dominantly inductive for the H scan coils so a rectangular voltage drive is required for the H scanning coils for a sawtooth current. However significantly resistive and inductive for the vertical coils, so they require a combination of a sawtooth voltage combined with a rectangular wave (called a Trapezoidal wave) applied to have a sawtooth current for scan and a rapid flyback for vertical retrace.

This is why vertical deflection amplifiers have can have scan linearity potentiometers that alter the analog conditions in them and the shape of the sawtooth voltage.

In H scan output stages, the linearity cannot be adjusted (as the H transistor is in switch mode and its drive wave has no effect on the scan linearity) so instead they have saturable magnetic reactors in series with the yoke and S correction capacitors to achieve a linear scan that way.


PS: I have attached an image, out of interest, for those curious about VDU's, on how a scanning raster is formed. Very few have seen this image these days. It was published by Manfred Von Ardenne in a vintage textbook. He was an early television researcher (among his other talents) in Germany before WW2. It was acquired by a camera on a rotating mount spinning in front of a TV monitor. Without that knowledge, it would be very difficult to understand how such an image was acquired.
 

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PS: I have attached an image, out of interest, for those curious about VDU's, on how a scanning raster is formed. Very few have seen this image these days. It was published by Manfred Von Ardenne in a vintage textbook. He was an early television researcher (among his other talents) in Germany before WW2. It was acquired by a camera on a rotating mount spinning in front of a TV monitor. Without that knowledge, it would be very difficult to understand how such an image was acquired.

Wow that's an interesting picture! Thanks for sharing!
 
Looking at the schematic, there is no mechanism that I can see how an abnormal vertical drive signal from the computer could damage any of the transistors or components in the vertical scan amplifier & output stage. The "killer poke" is busted in my opinion. As I mentioned though, this is not the case for the Horizontal circuits and an abnormal H drive signal can cause big trouble.
 
Hi. Maybe a bit off topic but I do need and will appreciate your expert advice on the following NTSC problem (I am from Europe and NTSC is somewhat new to me). This is my first experience with a sony pvm (1440qm) monitor. The problem is it displays the first scan line with a given color in different color dots and what is worse a scan line after the line with a given color that scanline is supposed to be completely black with no visible dots on it. The sources are NTSC Apple2 computers (tried couple of them -- same effect). The same luminance only image (when monochrome source is used only) shows no dots at these positions at all. On a composite NTCS signal if a chroma displaying is completely reduced via the control potentiometer on front of the monitor the "defective" dots on completely blank scanlines become grey/white but still are present! I do think that somehow an information from a previous line is interfering via a 64uS delay line which shouldn't be used at all with the NTSC system. A modest 10" JVC TM monitor is displaying these same images "properly". I am attaching some pictures and will make more if you need from the PVM monitor, just look for the *vertically* bleeding downwards parasitic dots on what is supposed to be black scanlines. Why are these dots there on black scanlines? Their frequency is probably 3.58 MHz...


green.jpgbw.jpgorange.jpg
 
Hi. Maybe a bit off topic but I do need and will appreciate your expert advice on the following NTSC problem (I am from Europe and NTSC is somewhat new to me). This is my first experience with a sony pvm (1440qm) monitor. The problem is it displays the first scan line with a given color in different color dots and what is worse a scan line after the line with a given color that scanline is supposed to be completely black with no visible dots on it. The sources are NTSC Apple2 computers (tried couple of them -- same effect). The same luminance only image (when monochrome source is used only) shows no dots at these positions at all. On a composite NTCS signal if a chroma displaying is completely reduced via the control potentiometer on front of the monitor the "defective" dots on completely blank scanlines become grey/white but still are present! I do think that somehow an information from a previous line is interfering via a 64uS delay line which shouldn't be used at all with the NTSC system. A modest 10" JVC TM monitor is displaying these same images "properly". I am attaching some pictures and will make more if you need from the PVM monitor, just look for the *vertically* bleeding downwards parasitic dots on what is supposed to be black scanlines. Why are these dots there on black scanlines? Their frequency is probably 3.58 MHz...


View attachment 60471View attachment 60470View attachment 60472

One thing of note is that Sony PAL encoders don't work like standard encoders with delay lines. Here is an interesting thread on the topic:

https://www.vintage-radio.net/forum/showthread.php?t=136086
 
Looking at the schematic, there is no mechanism that I can see how an abnormal vertical drive signal from the computer could damage any of the transistors or components in the vertical scan amplifier & output stage. The "killer poke" is busted in my opinion. As I mentioned though, this is not the case for the Horizontal circuits and an abnormal H drive signal can cause big trouble.

Interesting. But indeed while trying to film such a situation, we found something that actually messes up the HSync as well it seems. See this twitter thread: https://twitter.com/AkBKukU/status/1254104735554002945?s=20

VICE crashes at that point with a CPU JAM, but if you let it continue (just skip or go into a CPU loop), VICE shows you that the video output is broken... Let's see here:

PET: cycles per frame set to 20042, refresh to 49.895Hz
PET: cycles per frame set to 20050, refresh to 49.875Hz
*** Main CPU: JAM at $0003
PET: cycles per frame set to 15208, refresh to 65.754Hz
PET: cycles per frame set to 401, refresh to 2493.765Hz

Not sure yet what the cause of this is, but we'll find out and see if this is just a crash artefact or something intended for the old PET and crashing the new PET.

Thanks
André
 
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