I wrote the XIOS and supporting stuff for an implementation of MP/M 1.0. Paging? Not hardly. Bankswitched memory is all. Would that it could have paged--we had a memory mapping scheme that allowed for dividing memory up in 64 1K pages (used a Fairchild 64x9 bipolar SRAM). But no--simple bankswitching, and the model was 16KB bank boundaries.
(We eventually came up with our own OS that made use of the 1K granularity).
Disk structure the same as CP/M. I still have the OEM kit for MP/M 2, complete with price list. Basically, MP/M is built on CP/M structure with added functions such as file locking. It did introduce the page relocatable executable file (.PRL), which was originally obtained by assembling a program twice--the second time orged 100h bytes higher and the two binaries were compared and a bitmap constructed of the differences. The idea is that PRL files can be (within reason) relocated to any 100h byte address boundary. I believe that disk user areas preceded MP/M.
MP/M did require a clock and worked best with interrupts on most devices. CP/M, on the other hand, did not--everything could be done poll-mode.
As an early multi-user system for micros, it was interesting--and full of bugs as you might expect. CP/M 3.0 or CP/M Plus was derived from the MP/M base.
More interesting to me was that not only a relocatable macro assembler but a PL/I subset compiler was part of the MP/M OEM distribution. Doing PL/I on an 8080 must have been a daunting task.
