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Lanier Model 103 "No Problem" word processor

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Well, that was fun to trace out.
That's all the jumps and calls in the code.

Now I need to sit down and look at it critically and figure what they're actually doing. There's a bit of junk crap code in there (ain't that always great?) that's not used and makes no sense. There's a few looping bits and a bunch of reference to memory locations, &8000 in particular.

Phil
 
Just started working on the code, reverse engineering what it needs to flow.

Correct me if I am wrong, but if we see
IN, 05
DEC A
RAR
A OR 0C
JZ &nnnn

Reverse engineering that says we are looking for the logical OR of 0C: 01100, 01000 or 00100
Undo the RAR by RAL: 11000, 10000 or 01000
Then INC to undo the DEC: 11001, 10001 or 01001

That leaves us with the original 3 options coming from the IN, 5 that make the logic flow through that path, correct?

Just making sure I understand that logic because it's been a long time since I did bitwise math.

Phil
 
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Thinking in terms of 8080 mnemonics:

IN 05
DCR A
RAR
ORA C (A = reg A OR reg C)
JNZ...

Trying to understand what you're getting at. Note that IN and DCR do not affect the setting of the carry bit, so it gets rotated into bit 0 by the RAR.

I hope I understand this; the listing image isn't too clear.
 
Thinking in terms of 8080 mnemonics:

IN 05
DCR A
RAR
ORA C (A = reg A OR reg C)
JNZ...

Trying to understand what you're getting at. Note that IN and DCR do not affect the setting of the carry bit, so it gets rotated into bit 0 by the RAR.

I hope I understand this; the listing image isn't too clear.
It wasn't meant to be clear, that was merely a "ugh, so many arrows" image.

What i was getting at was my interpretation of the bitwise logic and my way of undoing it.

I just saw I screwed up a step, leading to your confusion, sorry. The operation would be to do a logical compare of the value in the accumulator against the value 0Ch.
ORI 0C
For that to be true, A can contain 3 possible combinations of bits.
Then to undo the RAR operation, we perform RAL.
Then perform INC to undo the DEC.
The three results of those operations are the three initial conditions that must be met for the final step OR to vend a TRUE, yes?
 
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It wasn't meant to be clear, that was merely a "ugh, so many arrows" image.

What i was getting at was my interpretation of the bitwise logic and my way of undoing it.

I just saw I screwed up a step, leading to your confusion, sorry. The operation would be to do a logical compare of the value in the accumulator against the value 0Ch.
ORI 0C
For that to be true, A can contain 3 possible combinations of bits.
Then to undo the RAR operation, we perform RAL.
Then perform INC to undo the DEC.
The three results of those operations are the three initial conditions that must be met for the final step OR to vend a TRUE, yes?
I'm more versed in 8086 than 8080, but this does seem right to me (assembly is assembly after all). Pretty cool thread you have going here by the way!
 
The code snippet from the ROM is:


IN 05
ANI 03
JZ 0017
MOV B, A
DCR A
RRC
ORI 0C

What I was trying to do was work backwards through it to determine what inputs from IN 05 would give a TRUE output. I wasn't sure if my logic was sound.

Phil
 
That's easy. Any input of xxxx xx00 will cause the jump to be taken. The result of the ANI will be either 00000010, 00000001 or 00000011. Those two low order bits will be saved in B. Meanwhile, the DCR will produce, respectively,
00000001, 00000000 or 00000010, After the RRC, A will be 00000000 (carry set), 00000000 or 00000001 (carry clear. After the OR, we'll have (carry clear) 00001100 or 00001101.
 
This is why I asked. I'm so rusty at this.

I wrote a little program to poke at various values. I need to rewrite it in a loop to explore the full functionality of the logic.

Thank you for putting me right.
 
Wrote a little program to see what the results of the code would be on all available input values.
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Why, you ask? Mostly to start re-familiarizing myself with the way the 8080/Z80 handle data. Yes, I now know step 1815 is redundant. That's part of why I'm doing this. To get better at writing and understanding assembly.

Phil
 
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Bought some Atmel 2kB E2PROM chips. They arrived in so I set about bit-bashing them with my Arduino. Successful loop written, sequential data now in memory (it had a little bit of random trash in it when it arrived, mostly zeros though).

I need to build a chip converter so it'll match the ROM slot on the board but the first iteration will likely just be flying leads.

First test: NOP loop.

When we're back in the house (end of the month) I'll be able to continue work on this.

Phil
 
Somewhere along the line, I have managed to lose 12 bytes of the original PROM. Unless that is, I have miscounted.

I'll re-read it. I wrote what I have into the E2PROM tonight and that checked out, at least.

Phil
 
I need to determine the i/o, haven't managed that yet. I did take photos of the board as I removed the chips to socket them, but I have a feeling those pictures are lost since the hurricane.

I should be able to start to get back to this soon, though.

Phil
 
If possible, and I'm sure you already plan on doing this, isolate the CPU and ROM from everything else including RAM and get those confirmed working first with a known good ROM and program to run that doesn't need RAM to do something like blink an LED attached to a custom IO board that uses your 40pin clip or some other way of getting some kind of IO out of it. Then add the ram back one card or chip at a time and confirm functionality with a program that can use or detect it's presence. Then start adding buffer chips, glue logic, and IO cards back until it fails again and go from there. Once the CPU RAM and ROM are working you have another attack vector for reverse engineering and debugging everything else.
 
Yeah, just starting to look at this again. Not missing 12 bytes, the last 12 bytes of the ROM are NOP.

Just found the pinout of the ROM so I will write some basics and do as you suggest above.

Phil
 
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