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PET 2001 E6 Connection Question

Normally a TTL output stage pulls up to around 3.5v and this is assisted by inputs connected to it from other gates, because TTL input pins source current, at least 1.6mA for plain TTL. It is unusual to be under 2.8 to 3v on an output pin when it is high, unless for some reason the input resistance of the logic probe you have, has something like pull down resistors. It might, you wouldn't notice with a CMOS output, but TTL is much better at sinking current than sourcing it. Perhaps double check the output pin voltages with a DVM, though it would have to be a pin with no pulses on it to be accurate, or maybe try the scope with a x10 probe.

1.65V is getting too low to be a definite logic high, though it would likely be interpreted as high by most gate inputs, some gates the input threshold is around 1.4v . Anything below 2V is not ideal though and would have very poor noise immunity.
 
Assuming the outputs from D6 and D7 (SN74177) are all 'funny values', then this is likely to be down to D6 and D7 themselves being faulty.

If you are measuring the output pin voltages with an oscilloscope, and they are static levels at 1.6 (ish) Volts, and the inputs are good, then this is a good indication of a fault.

However, I have come across another type of failure mode that can also account for this. This being the ground pin of the IC (pin 7 in the case of a SN74177) has come adrift from the ground rail - or the ground rail has become isolated from the power supply ground itself. The input signals to the IC will indicate correct (as they are sourced from the power rails of the device outputting the signal) but the IC is not fed with a valid ground - and, therefore, can't drive its signals correctly.

This is quite easily determined by either using a multimeter (or oscilloscope) directly on the power pins of the IC device (pin 7 = ground and pin 14 = +5V in the case of a SN74177). Note to use pin 7 as the ground clip of the oscilloscope if using the oscilloscope.

If the voltage reads correctly (at +5V +/- 5% = 4.75 to 5.25 Volts) then the IC (D6 and D7) are probably faulty.

Dave
 
Yesterday was fairly busy but I had an hour to look at it before going to bed. Ran the board without the latch and still saw the counters not counting. Scope capture in my responses. I don't remember QB being as low as it is.

Hugo Holden said:
Normally a TTL output stage pulls up to around 3.5v and this is assisted by inputs connected to it from other gates, because TTL input pins source current, at least 1.6mA for plain TTL. It is unusual to be under 2.8 to 3v on an output pin when it is high, unless for some reason the input resistance of the logic probe you have, has something like pull down resistors. It might, you wouldn't notice with a CMOS output, but TTL is much better at sinking current than sourcing it. Perhaps double check the output pin voltages with a DVM, though it would have to be a pin with no pulses on it to be accurate, or maybe try the scope with a x10 probe.

1.65V is getting too low to be a definite logic high, though it would likely be interpreted as high by most gate inputs, some gates the input threshold is around 1.4v . Anything below 2V is not ideal though and would have very poor noise immunity.
Click to expand...
The Scope was with a 10x probe. And I started using the Saleae again because I forgot its analog measurements are still fast enough for this. It has a 2meg input resistance to ground. I have been getting lazy on my ground clips for what its worth. Not putting them on the ground of the IC I have been probing.
But I should probably start being better about it now that i'm taking actual measurements instead of eyeballing signals.

This is what I got on D6 with the E6 latch removed. Its easier to share the Saleaes captures then the ancient tektronix I got.
Load/CLR/CL1 are all digital but ive seen them analog and they look fine.
QA-QD are all analog. I don't have them all scaled the same in this image so keep that in mind.
D6_No_Latch.png

daver2 said:
Assuming the outputs from D6 and D7 (SN74177) are all 'funny values', then this is likely to be down to D6 and D7 themselves being faulty.

If you are measuring the output pin voltages with an oscilloscope, and they are static levels at 1.6 (ish) Volts, and the inputs are good, then this is a good indication of a fault.

However, I have come across another type of failure mode that can also account for this. This being the ground pin of the IC (pin 7 in the case of a SN74177) has come adrift from the ground rail - or the ground rail has become isolated from the power supply ground itself. The input signals to the IC will indicate correct (as they are sourced from the power rails of the device outputting the signal) but the IC is not fed with a valid ground - and, therefore, can't drive its signals correctly.

This is quite easily determined by either using a multimeter (or oscilloscope) directly on the power pins of the IC device (pin 7 = ground and pin 14 = +5V in the case of a SN74177). Note to use pin 7 as the ground clip of the oscilloscope if using the oscilloscope.

If the voltage reads correctly (at +5V +/- 5% = 4.75 to 5.25 Volts) then the IC (D6 and D7) are probably faulty.

Dave
Click to expand...
Understood ill double check the voltage between those pins when I'm able to get home. And yes they are static ish values. You can see the measurement on the Saleae rather then the regular scope above. The only one that's strange is QB which seems to have some connection to CL1?
Had too many obligations yesterday to verify the removed Latch was at least somewhat functional on a breadboard. But these counters not counting hint that it wasn't that.
 
I don't know what a Saleae is but I can say this:

The recordings acquired by many logic analyzers are a "digital reconstruction" of the signals that are there which crossed the specific assigned logic thresholds of the device being examined. Their amplitudes have little meaning and there is no guarantee that a signal seen on the display, is able to cross the logic threshold of some random gate in the circuitry on the board.

This is one reason I prefer the scope. This is because, if you know the architecture of the output stages in the logic chips you are dealing with (they are in TI's handbook), it becomes plainly obvious if something is wrong, or if that output stage is being overloaded, to this extent it pays to wear an analog cap in fault finding this sort of issue.
 
In the scenario you have there (/LOAD = HIGH and /CLR = HIGH - Your D4 and D5 respectively) the output from QA should be clocking at half the frequency of CL1.

QA is then fed back into the clock for the next stage (CL2). This should cause the QA output (more correctly the CL2 input) to be further divided by 2 for the QB, QC and QD outputs.

When /CLR goes LOW, the outputs QA, QB, QC and QD should all go LOW.

When /LOAD goes LOW, the outputs QA, QB, QC and QD should take up the values presented to the inputs on A, B, C and D respectively.

With E6 removed, all of the inputs (A, B, C and D) should float to a logic HIGH. This should get latched into the outputs when /LOAD goes LOW. Again, this all looks suspect...

Dave
 
Hugo Holden said:
I don't know what a Saleae is but I can say this:

The recordings acquired by many logic analyzers are a "digital reconstruction" of the signals that are there which crossed the specific assigned logic thresholds of the device being examined. Their amplitudes have little meaning and there is no guarantee that a signal seen on the display, is able to cross the logic threshold of some random gate in the circuitry on the board.

This is one reason I prefer the scope. This is because, if you know the architecture of the output stages in the logic chips you are dealing with (they are in TI's handbook), it becomes plainly obvious if something is wrong, or if that output stage is being overloaded, to this extent it pays to wear an analog cap in fault finding this sort of issue.
Click to expand...
For sure im gonna make sure to go back and double check with a scope more often. Just gonna do quick first passes on the logic analyzer since it has 16 channels vs my scopes 2.


daver2 said:
In the scenario you have there (/LOAD = HIGH and /CLR = HIGH - Your D4 and D5 respectively) the output from QA should be clocking at half the frequency of CL1.

QA is then fed back into the clock for the next stage (CL2). This should cause the QA output (more correctly the CL2 input) to be further divided by 2 for the QB, QC and QD outputs.

When /CLR goes LOW, the outputs QA, QB, QC and QD should all go LOW.

When /LOAD goes LOW, the outputs QA, QB, QC and QD should take up the values presented to the inputs on A, B, C and D respectively.

With E6 removed, all of the inputs (A, B, C and D) should float to a logic HIGH. This should get latched into the outputs when /LOAD goes LOW. Again, this all looks suspect...

Dave
Click to expand...

Yah D6/D7 looked bad. Got some parts in so I ended up removing them, socketing them all up (E6,D6,D7) and replacing them. Admittedly I think I could have gotten by with not replacing the latch.
But I got excited and wanted to see if replacing the three would fix it.

Checked the vertical signal and it looked about right! Then plugged everything back in and fired it up. Got this displayed on the screen!
Which from what i can tell is not a good sign. But I'm pumped its showing anything now!
Snapchat-793893517.jpg

So one issue down. Probably plenty to go. I'm going to start reading up on the other parts of this computer to get more familiar with it before I dive in debugging.
On first glance it feels like it implies a full failure of the video ROM. But I need to study the circuit alot more before I really guess.
But I wanted to share atleast this for now!

Hugo we will see how long I last before I go fully your method. I just got my digikey shipment of all the passive components for when I go that route.

Thankyou for the help so far!
 
Oh also another question.

I hear power cycling these crts are really bad for them. Is that true?
Ive been operating the board disconnected from the display up until this point just incase.

Just asking because now the actual display is going to be useful for debugging and I think I need to make a display adapter to preserve the monitor.
But I don't know if Im being paranoid.
 
Well done on your first fix...

Looks like video ROM, but it could be a few other things as well. Video data latch, video ROM, parallel to serial shift register etc. Follow the video signal backwards from the the signal driving the monitor.

Power cycling the machine is not good for it either at this state! ICs can just break on a power-up.

Avoid needlessly power cycling the machine.

My suggestion is to fit a normally open push button (in series with a 100 Ohm resistor), wired between 0V and the /RESET signal. This will reset the logic without power cycling the machine.

Is the character generator ROM and/or video RAM in sockets by any chance?

Dave
 
daver2 said:
Well done on your first fix...

Looks like video ROM, but it could be a few other things as well. Video data latch, video ROM, parallel to serial shift register etc. Follow the video signal backwards from the the signal driving the monitor.

Power cycling the machine is not good for it either at this state! ICs can just break on a power-up.

Avoid needlessly power cycling the machine.

My suggestion is to fit a normally open push button (in series with a 100 Ohm resistor), wired between 0V and the /RESET signal. This will reset the logic without power cycling the machine.

Is the character generator ROM and/or video RAM in sockets by any chance?

Dave
Click to expand...
ah! didn't want to hear that but understood. I don't need to actually reset it that often in the debug process so ill avoid it. Setting probes up will just be more stressful.

Yes the character generator rom and video ram is socketed. If im reading the schematic right and we are talking about C3/C4 and A2.
 
Generally power cycling doesn't significantly damage the electronics on the main board, because the analog regulators do a good job protecting the ICs', SMPS not so much.

With a CRT based VDU, power cycling isn't a wonderful idea, for a couple of reasons. One is in the PET's case ideally it requires a stable H drive signal, if not correct that can stress the H output transistor with higher than normal peak collector voltages, and the high voltage rated components get stressed too, even for one cycle, if the H output transistor get held in conduction longer than usual, that elevates all of the auxiliary voltages including the EHT. So technically it is possible to damage the VDU with rapid power cycling, especially in a case where it relies on the H drive signal from another source (this problem is not as bad when a set has its own internal H scan oscillator and only relies on an H sync pulse)

One of the main risks for the CRT though, is if the unit is rapidly power cycled, the EHT doesn't have time to collapse and the heater is still hot emitting copious electrons, but the H & V scans may be collapsed, this can create a momentary intense flash where the beam energy is focused on a small spot and burn the CRT's phosphor. Most VDU's have built in turn off spot suppression, to one extent or another. It was somewhat inadequate in the PET VDU anyway. I have spent some years trying to perfect CRT turn off spot suppression and one feature of it, the system must recover quickly enough to keep working with rapid power cycling. Interestingly, by analogy, the same problem exists with current surges while trying to rapidly power cycle switch mode supplies (SMPS) where the same basic timing factors play a big role and good anti-surge suppression circuits can help deal with it.

So if you do power down the PET wait at least 20 seconds before re-powering it. Or if you want a faster reset, fit the reset button as Dave says.
 
Yes, C3/C4 and A2.

It is good news that the video RAM (C3 and C4) are in sockets. We can remove it and use eight off 100 Ohm resistors to connect the video RAM data outputs to 0V. This should cause an '@' character to be displayed in each character cell position of the screen.

If this is not the case, we can trouble shoot why not relatively easy.

My statement regarding power cycling was more to do with statistics. If (say) 10 ICs are going to die, they will die. However, they will probably die during a power up. This cannot be avoided - just delayed by power cycling less...

Dave
 
One failure mode of IC's is related to normal power cycling, in that if you have an IC that sits in a box at room temperature, mostly its unscathed 30 years later.

In some appliance though in daily use it gets heated up & cooled down and gets thermally cycled.

For power IC's this effect can be very bad in that sooner or later the dies of the power devices start to delaminate from the substrate.

One diabolical example of this is the horizontal trace output IC in the famous Tek 2465B scope, known as U800, in that delamination occurs with age. As the die of one of the output transistors separates, the trace , over a decade or more, usually starts to shift left with a DC offset. Then suddenly it "lets go" and the trace flies off the screen. I had unwittingly recorded this process because I had been taking screen photos of the scope for nearly 20 years. It was unfortunate that Tek didn't heat sink it well enough, because this would have reduced the magnitude of the thermal cycles which is almost as good as decreasing the number of thermal cycles.

Also U800 is a remarkable IC. There is nothing like it as a replacement part. It is essentially a very high frequency capable very fast OP amp with high voltage power output stages. So when they die it is a tragedy. Though somebody did try to replicate it with a discrete component solution, but it cannot perform all of the functions of the original part. Some people have even tried baking the IC's to try to re-attach the delaminated parts. I wrote an article on this problem, if anyone is interested in the topic for the 2465B:

 
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daver2 said:
Yes, C3/C4 and A2.

It is good news that the video RAM (C3 and C4) are in sockets. We can remove it and use eight off 100 Ohm resistors to connect the video RAM data outputs to 0V. This should cause an '@' character to be displayed in each character cell position of the screen.

If this is not the case, we can trouble shoot why not relatively easy.

My statement regarding power cycling was more to do with statistics. If (say) 10 ICs are going to die, they will die. However, they will probably die during a power up. This cannot be avoided - just delayed by power cycling less...

Dave
Click to expand...
Smart! It didn't display all "@" signs but instead displayed a full screen of "█" characters (C3/C4 still removed). Which I take is all high signals. Going back in to reverify with a scope.

I will admit I did cave a little. Found a retro chip tester for a good deal used on ebay and got it.
It had a setting for dumping the MPS 6540 which came up empty. Which makes sense with showing all "█" unless empty for that chip should mean all 0s.
Going to verify it with scope measurements so I'm not trusting the chip tester entirely but I'm thinking I'm gonna have to order a replacement.

I took a look at the two memory chips (C3/C4) in the chip tester also and one of the two failed. Again it wasn't tested in circuit so maybe its fine for the speeds the board runs at. But I just marked it with red tape for now
incase I have an issue that could point to it in the future.

One thing that gave me some hesitation was the chips were TMS 4045 ICs instead of 2114 ICs as specified. Which worried me that someone was in here before me and I could be looking at a board they gave up on repairing.
But reading up it sounds like there are sooo many alternatives for the 2114s that im hoping the 4045s were just a second source used in production.


Hugo Holden said:
One failure mode of IC's is related to normal power cycling, in that if you have an IC that sits in a box at room temperature, mostly its unscathed 30 years later.

In some appliance though in daily use it gets heated up & cooled down and gets thermally cycled.

For power IC's this effect can be very bad in that sooner or later the dies of the power devices start to delaminate from the substrate.

One diabolical example of this is the horizontal trace output IC in the famous Tek 2465B scope, known as U800, in that delamination occurs with age. As the die of one of the output transistors separates, the trace , over a decade or more, usually starts to shift left with a DC offset. Then suddenly it "lets go" and the trace flies off the screen. I had unwittingly recorded this process because I had been taking screen photos of the scope for nearly 20 years. It was unfortunate that Tek didn't heat sink it well enough, because this would have reduced the magnitude of the thermal cycles which is almost as good as decreasing the number of thermal cycles.

Also U800 is a remarkable IC. There is nothing like it as a replacement part. It is essentially a very high frequency capable very fast OP amp with high voltage power output stages. So when they die it is a tragedy. Though somebody did try to replicate it with a discrete component solution, but it cannot perform all of the functions of the original part. Some people have even tried baking the IC's to try to re-attach the delaminated parts. I wrote an article on this problem, if anyone is interested in the topic for the 2465B:

Click to expand...
Gotcha gotcha understood. Very good info.
Oof yah it sucks to lose something that doesn't have a proper replacement. Ive been paranoid on this board that one of the fried ICs will end up being something rare.
 
>>> Smart! It didn't display all "@" signs but instead displayed a full screen of "█" characters (C3/C4 still removed). Which I take is all high signals.

Sorry, incorrect assumption. All 'high' (from the data outputs from C3/C4) should be an inverse checkerboard display - not a solid block.

1737650917061.png

A good website is: https://www.pagetable.com/c64ref/charset/. Select the correct PET and character set.

Dave
 
Sorry I meant it implies the character rom a2 is outputting all high despite its c3/c4 inputs being pulled down to ground using the jumpers mentioned and c3/c4 ics removed.
 
Ok so im pretty sure the character ROM is dead dead. Doesn't seem to be responding.

As far as replacing it goes I could find plenty of people that have made adapters for the 6540 but none of them looked in stock. I liked this guys adapter design (D'asaro's Design) to be able to use a 2716 or 2732 EPROM in replacement. However they made it in express PCBs software which only lets you order it through Express PCB no gerber export unless you order. Which you can even order anymore because they changed their design constraints which their design breaks and there is no option to waive. Which I was just about to remake his design in Cadence Allegro until I saw that giobbi was able to extract the gerbers at some point. Big shoutouts D'asaro/Giobbi if you stumble on this thread.

Anyways before I ordered the parts to make these adapters I wanted to see if I could rule out any obvious duds with the other ROMs. Since my debugging hasn't even touched those circuits yet I just dumped their contents using the Vintage Chip Tester and compared their CRCs with known dumped binaries.
Binaries grabbed from here. If anyone is reading this while debugging their pet don't take these CRC values as Gospel calculate yourself using the binaries from the link.

ROM_Check.png


The markings on the chips imply the original ROM set for regular basic. But UH2-UH5 don't seem to match what they should be or any known ROM according to my previous link. Like yall were saying to me previously. This is all out of circuit testing. Potentially the CRCs are only coming up bad because the retro chip tester is reading them at their maximum read rate. They might work in circuit. But since I'm not at the stage of debugging those circuits yet I'm just gonna order parts to make extra ROM adapters. And who knows. If UH2-UH-5 actually end up working in circuit maybe I just use my extra parts laying around as an excuse to try out some of the ROM upgrades this device could have had.

I flirted with the idea designing my own adapter using a 5V parallel flash chip instead of the 2716/2732 EPROM because its cheaper.... but I decided to keep this repair to one project at a time... and more importantly one thing to debug at a time...

As far as programming the EPROMs in a dusty corner of my office there is a BP Microsystems 1410 that I think can do the job. Idk ill have to mess around with it to see. But my boss is fine with me programming with it.

While I was going ham with the chip tester I decided to test the rest of the socketed SRAM chips before I put an order in. I identified a number which might end up being bad. Who knows in circuit. But they were very cheap to find replacements of. So I ordered some more. If they arn't needed at the end of the day im sure ill need 2114 ICs for a future computer debug anyways and if they are needed Ill save on the shipping time.
 
daver2 said:
I would argue that a @bitfixer or @Nivag Swerdna ROMulator is the way to go initially.

These are installed in the CPU socket (if there is one of course).

Check them both out before making a decision.

Dave
Click to expand...
Yah I think that would be the better course of action also. But they were on backorder when I looked at them with no lead times listed so I looked for other options.
Maybe I should put in an order of it anyways though incase the lead time ends up being short or I run into trouble with the ROMs/RAM later.
 
>>> But they were on backorder when I looked at them with no lead times listed.

This is always the problem with limited-interest projects - like resurrecting PETs outside of the fraternity...

Dave
 
week3 said:
The markings on the chips imply the original ROM set for regular basic. But UH2-UH5 don't seem to match what they should be or any known ROM according to my previous link. Like yall were saying to me previously. This is all out of circuit testing. Potentially the CRCs are only coming up bad because the retro chip tester is reading them at their maximum read rate. They might work in circuit. But since I'm not
Click to expand...
Ensure that the RCT is not powered by USB (or use a good USB power supply that delivers 5v). USB delivers 5v +/- 10%, and CBM roms are very cranky when the voltage is too low (sometimes you cannot read these reliable when the voltage is below 4.8v).
 
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