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Pet 2001 strange characters

Probably the original 74LS154 was good, and I would say that Matsushita part is also fine. If it appears to be misbehaving, there will likely be an issue with its input logic conditions, or a broken track etc. It is often easier to blame the ICwhen it is the surrounding circuitry that has the issue, If you really want to convince yourself, you can set the 74LS154 up in a socket on a test board, apply the control signals A,B,C,D as static voltages from a mechanical 16 position A-F Hex switch with tie resistors, and check that the 74LS154's outputs obey its function table. It is simply a 1 of 16 active low output decoder and its easy to check if taking either G1 or G2 High, deactivates it.
 
Hugo Holden said:
Probably the original 74LS154 was good, and I would say that Matsushita part is also fine. If it appears to be misbehaving, there will likely be an issue with its input logic conditions, or a broken track etc. It is often easier to blame the ICwhen it is the surrounding circuitry that has the issue, If you really want to convince yourself, you can set the 74LS154 up in a socket on a test board, apply the control signals A,B,C,D as static voltages from a mechanical 16 position A-F Hex switch with tie resistors, and check that the 74LS154's outputs obey its function table. It is simply a 1 of 16 active low output decoder and its easy to check if taking either G1 or G2 High, deactivates it.
Click to expand...
Nice way of testing.
 
What i wanted to do :

Check power on h3, 74LS154, 74ls00 and 74ls21.

As far as i thought to understand was that the cs pin 17 of the h3 rom would have a direct connect to the 74ls00 output.
So 3, 6, 10 or 13.

When the beep mode on the multimeter i thought i could check this connection.
Trace it further to the input of that , trace that back to the output of the 74ls21 and further.
Also to check to pcb for cracks.

But i cannot find a connection from h3-17 , to any of the chips.

Am i thinking wrong?

Tried pin 3 on h3 too.
 
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Looking at the schematic (and the H references on the ROMs may not be fully correct) H3 pin 17 is connected to +5V. So, H3 pin 17 should be connected to H3 pin 27 and H3 pin 12.

I am now getting confused between DM posts, and thread posts etc.

Can we stick to posts in the thread please.

I am not sure what schematic you are using or whether you are referring to the 'H' ROM numbers on the schematic or the PCB (if they are different).

74154 pin 16 (signal /SELE) should be connected to ONE of the 'H' ROM sockets on pin 3. Which socket is this ON THE PCB, and does this align with the 'H' number on the schematic here: https://www.zimmers.net/anonftp/pub/cbm/schematics/computers/pet/2001/320132-2.gif.

74154 pin 17 (signal /SELF) should be connected to TWO of the 'H' ROM sockets on pin 3. Which sockets are these ON THE PCB, and do they align with the 'H' numbers on the schematic?

I am not sure where the 74LS21 and 74LS00 come into the equation. The /SELE and /SELF signals do go to various gates, but (for our current purpose) this is irrelevant. It becomes relevant if we are looking at why the CPU can't read correctly from the ROMs. At the moment I am just trying to ascertain whether the Kernal ROM ($F800 to $FFFF) and the PETTESTER EPROM ($E000 to $E7FF) are in the correct sockets - and whether there is an inconsistency between the 'H' numbers on the schematic and on the PCB.

Dave
 
Checked with a thinner probe 😀

Pin 3 of the roms are connected to 74LS154 on pin ..

H7 17
H6 16
H5 15
H4 18
H3 17
H2 16
H1 15
 
Sorry to disappoint you, but a 6540 is a 2K ROM device not a 4K device.

As you have just shown (in post #87) both H7 and H3 are connected to 74154 pin 17 (/SELF) so further address decoding is implemented by BA11.

Likewise H6 and H2, H5 and H1. The only device that isn't is H4.

Dave
 
Ok. What's the next step.
For me i wanted to check for physical connection without Crack also to be sure
 
Well, we still haven't fully identified which ROM socket contains the ROM for the address range $F800 to $FFFF. This is my post regarding the connection of BA11.

There also has to be an error in your post #86. 74154 pin 18 is 0V/GND and is not wired to a ROM chip select line...

Dave
 
daver2 said:
Well, we still haven't fully identified which ROM socket contains the ROM for the address range $F800 to $FFFF. This is my post regarding the connection of BA11.

There also has to be an error in your post #86. 74154 pin 18 is 0V/GND and is not wired to a ROM chip select line...

Dave
Click to expand...
I thought a deleted that. The last is certainly an error
 
Not sure if this helps at all...

1762291039529.png

The numbering on the PET ROMs is very confusing...

1762291142156.png

So a 901439-07 in H7 and a PETTESTER in H3 is what you want.

1762291307720.png

Ignore me if this was already obvious.
 
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For me the results of the nop tester look ok
Every address gives a block signal. And every step higher i get less blocks in the screen and need to change the timescale.
 
According to chatgpt this is ok

Your scope time base is 1 µs/div, and one full A0 cycle spans roughly 4 µs → 250 kHz.

Since each NOP takes 2 CPU clocks, A0 toggles every 2 NOPs, so:


f_{A0} = \frac{f_{CPU}}{4}

f_{CPU} = 4 × 250 kHz = 1 MHz

So everything checks out perfectly:
👉 Your CPU clock, NOP tester, and address bus are all behaving normally.
 
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