daver2
10k Member
Excellent.
So, there is some 'science' to the NOP generator rather than just looking at pretty pictures.
For address line A0 on the CPU - i.e. ahead of the address buffers, the frequency should be 250 kHz. On your oscilloscope, this is 4 divisions at 1.0 us/div = 4 us = 250 kHz. Correct answer. See: https://www.unitjuggler.com/convert-frequency-from-µs(p)-to-kHz.html?val=4.
You also need to look at the HIGH and LOW voltage levels for the TTL signal. I generally work on the principle that a maximum LOW voltage level of 0.5 Volts is fine (i.e. a reading of < 0.5 Volts is good). and a minimum HIGH voltage level of 4.0 Volts is fine (i.e. a reading of > 4.0 Volts is good). Of course, the lower the LOW reading is, and the higher the HIGH reading is, the better.
Also, the frequency should be absolutely stable.
The above tests for any faulty address lines and short circuits between the CPU address lines.
As you measure higher address lines, the frequency should halve for each subsequent address line.
So, A1 = A0/2 = 250 kHz/2 = 125 kHz.
Science... If you have access to a spreadsheet, use that to ascertain what you should see on your oscilloscope.
After you have checked ALL of the address lines on the CPU (signals A0 to A15) you can then test on the other side of the address buffers (signals BA0 to BA11):

This check makes sure that the buffers for the address bus are working OK and that there are no short circuits. Again, the correct frequencies and acceptable voltage levels.
You can then check on the pins of the ROMS and logic gates D2, D3 and D4 (for the BAn signals). This checks for PCB track breaks or other related issues...
After that, I will teach you how to check a few other CPU signals, and we can move on to check the 74154 address decoder and buffer enable signals.
We can also perform a limited test on the data bus - but this is not science (at this stage) but a bit of magic!
Does this make sense?
Dave
So, there is some 'science' to the NOP generator rather than just looking at pretty pictures.
For address line A0 on the CPU - i.e. ahead of the address buffers, the frequency should be 250 kHz. On your oscilloscope, this is 4 divisions at 1.0 us/div = 4 us = 250 kHz. Correct answer. See: https://www.unitjuggler.com/convert-frequency-from-µs(p)-to-kHz.html?val=4.
You also need to look at the HIGH and LOW voltage levels for the TTL signal. I generally work on the principle that a maximum LOW voltage level of 0.5 Volts is fine (i.e. a reading of < 0.5 Volts is good). and a minimum HIGH voltage level of 4.0 Volts is fine (i.e. a reading of > 4.0 Volts is good). Of course, the lower the LOW reading is, and the higher the HIGH reading is, the better.
Also, the frequency should be absolutely stable.
The above tests for any faulty address lines and short circuits between the CPU address lines.
As you measure higher address lines, the frequency should halve for each subsequent address line.
So, A1 = A0/2 = 250 kHz/2 = 125 kHz.
Science... If you have access to a spreadsheet, use that to ascertain what you should see on your oscilloscope.
After you have checked ALL of the address lines on the CPU (signals A0 to A15) you can then test on the other side of the address buffers (signals BA0 to BA11):

This check makes sure that the buffers for the address bus are working OK and that there are no short circuits. Again, the correct frequencies and acceptable voltage levels.
You can then check on the pins of the ROMS and logic gates D2, D3 and D4 (for the BAn signals). This checks for PCB track breaks or other related issues...
After that, I will teach you how to check a few other CPU signals, and we can move on to check the 74154 address decoder and buffer enable signals.
We can also perform a limited test on the data bus - but this is not science (at this stage) but a bit of magic!
Does this make sense?
Dave

