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Project: Core Memory for S-100 -- Ferroelectric RAM

glitch

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I FINALLY FINISHED MY PROTOTYPE! Started it in 2010:

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Implemented as a wire wrapped prototype, there are already some things I plan on changing though!

Full writeup: http://www.glitchwrks.com/2016/03/29/ferroelectric-ram-part-1

So, basically, FeRAM is core on silicon. Tiny bits of magnetic material on silicon, completely nonvolatile, even destructive readout! I ordered samples from Ramtron (before Cypress bought them) and started using some of their serial FeRAM devices in modern microcontroller projects. I've had the parallel FM18W08 samples since 2010, and intended to build a S-100 board using them, but it's taken me this long to get there. I still haven't found the prototype schematics (stuck somewhere unexpected in the process of moving, probably), so finishing up the board required making some guesses on what I was originally trying to do. It works! The write inhibit circuitry was the last bit needed to make it usable -- before you had to manually hold the computer in reset during power up and power down, and even then you'd sometimes get corrupted memory.

Since I don't have my original schematic, I decided not to implement a few functions (mostly just PROT and UNPROT functionality, as described in my writeup). I'm planning on doing another revision and then a production board.

What's it good for? Basically you can use it just like core on a minicomputer. You can do front panel development without much risk of losing your work on power down. You can load monitors/bootstraps/whatever into RAM on one system, pull the board, and plug it into another S-100 system you're bringing up. You can load BASIC into your Altair 8800 from teletype, and not have to do it all over again when you power off. Nonvolatile characteristics aside, it's also a zero wait state low-power static RAM board.

The write inhibit circuit can also force the system into reset, if so jumpered, and supply /PWRFAIL on pin 13 of the bus, which is defined in IEEE-696. The board follows IEEE-696 signal specs for 8-bit systems. Not 16-bit capable at the moment, but a production version might include that functionality. It's also a fine static RAM board if you plug in some 62256 32K x 8 SRAMs and jumper over the write inhibit circuit.

Planned functionality includes monitoring the 8V rail instead of the 5V line after the local regulator, and support for protecting blocks of memory using either the PROT/UNPROT front panel switches or output to an I/O port.

Anyone interested in this?
 
Back in some old issue of Microcomputing or Kilobaud I seem to remember some guy taking a surplus Fabritek core module and hooking it up to his S100 system. I'm not sure that FRAM (or even MRAM) is an exact analogy of destructive-readout core, however.
 
That FeRAM is just what I was looking for for my PDP-8 on-a-chip home-brew board. The internal address latches even make for a much simpler design - because I can ditch the separate address latches in the current design!

Full marks. Now, is that device still available and how much is it...

Dave
 
Full marks. Now, is that device still available and how much is it...

Still available, but about 3x the price ($5 to over $15) for one chip now that Cypress is making them. The only way to get a reasonable price is a bulk buy. That would be part of doing a production board -- get the price down on the important parts!
 
Back in some old issue of Microcomputing or Kilobaud I seem to remember some guy taking a surplus Fabritek core module and hooking it up to his S100 system.

I believe I've also seen ads for a 4K core product for the S-100 bus. Never seen a board in person though. I've seen small Multibus core boards, so I suppose someone might've been making core for S-100 for some special application. I guess if IBM put their FSU RAM on a S-100 board, and HP made S-100 terminators, it wouldn't be that odd!

I'm not sure that FRAM (or even MRAM) is an exact analogy of destructive-readout core, however.

From the literature I've read, it's destructive read in the actual FeRAM array, but the interface chip hides that from the user.
 
Back in some old issue of Microcomputing or Kilobaud I seem to remember some guy taking a surplus Fabritek core module and hooking it up to his S100 system. I'm not sure that FRAM (or even MRAM) is an exact analogy of destructive-readout core, however.
FeRAM is pretty close, I think - even down to the destructive-read property. (Though as far as I've seen existing FeRAM parts mask that from the user and just present themselves as equivalent SRAM.) The downside to FeRAM is that, like core, it has a limited write life; MRAM doesn't.

I've thought of doing this a few times; I've got some FeRAM and MRAM sample parts hanging around. If I ever get my ass in gear on the little 65816 portable I've been thinking of building, I'll probably use a couple 32Kx8 MRAM parts for main memory.
 
On an S-100 system, I think it's probably safe to say that the average human will not experience a lifetime sufficiently long to see his FRAM parts failing from write fatigue.

I know that TI has a few models of the MSP430 that employ embedded FRAM.
 
Yep, used in the MSP430 for ultra low power! According to the spec sheet, you could write to the same memory address in a loop for decades with an 8080, so the write life of the FeRAM shouldn't be a problem on S-100 boxes.
 
I attribute the rise of the personal computer more to cheap RAM than monolithic microprocessors.

I remember conversations at about the time the 74181 ALU was introduced and the gist was "okay, I can make a simple CPU, but what di I do for memory?". I don't recall exactly when Intel brought out the 1101, but it was expensive. The original MITS Altair came with 256 bytes of SRAM; I sprang for the 4K DRAM boards (that was a mistake). Pretty much the only other alternative was core, although I did toy with a military-surplus drum (400Hz motor and all)--I think Meshna was selling those.
 
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