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Reading/writing SRAM?

S

snq

Experienced Member
Joined
Mar 29, 2009
Messages
164
Location
Sweden, way up north
I have an AST 486 that is bugging me about the serial and asset tag no longer being valid, and no matter what I try I just get errors where I try to set it using the tools I found.
So I decided to investigate...
I disassembled one of the tools that at least seems to read an empty asset tag but errors out when trying to set a new tag.
Found out it's calling some seemingly custom AST BIOS function to read/set it, so I dumped the F000h segment and started disassembling that.
So now I'm at the point where I can follow the entire process of how it's trying to set the new tag.

Basically it should be as simple as writing a 16 byte string to SRAM, maybe update a checksum somewhere afterwards but it never gets that far.
To write a byte to SRAM it uses this function:
Code: 
BIOS_F:33A8 _writeSRAM      proc near ; Select SRAM page and write AL at offset DX
BIOS_F:33A8                 pushf                   
BIOS_F:33A9                 cli
BIOS_F:33AA                 push    bx
BIOS_F:33AB                 push    ax
BIOS_F:33AC                 mov     ax, dx
BIOS_F:33AE                 xor     dx, dx
BIOS_F:33B0                 mov     bx, 100h
BIOS_F:33B3                 div     bx
BIOS_F:33B5                 push    dx
BIOS_F:33B6                 mov     dx, 0C00h       ; Select SRAM page
BIOS_F:33B9                 out     dx, al
BIOS_F:33BA                 pop     dx
BIOS_F:33BB                 add     dx, 800h
BIOS_F:33BF                 pop     ax
BIOS_F:33C0                 out     dx, al          ; Write SRAM byte
BIOS_F:33C1                 pop     bx
BIOS_F:33C2                 popf
BIOS_F:33C3                 retn
BIOS_F:33C3 _writeSRAM      endp
This function takes the location in DX and the value in AL. Divides DX by 256 to get the page number (256 byte pages), selects that page by outputting it to IO port 0C00h.
Now that page should be mapped to 0800h-08FFh, and it outputs AL to 0800h+remainder.

The problem is, this doesn't seem to work on my machine...
So I replicated the BIOS code and tried writing something to the address of the asset tag.
Now here's my problem.. No matter what I write, it always reads back as 255.

And this is where I'm stuck, I don't know why it's behaving like this. I have a couple of guesses but not sure how to test.
I think either the SRAM is bad, or it simply doesn't exist, or 255 is the default content after power/memory loss and it's write protected.
Or maybe there's just something wrong with my code :rolleyes:

Any ideas?

This is the code I use, so pretty much a C version of the above asm code.
Code: 
BYTE readSRAM(WORD ofs)
{
    BYTE page = (ofs>>8);
    ofs &= 255;
    _disable();
    outp(0xC00, page);
    BYTE data = inp(0x800 + ofs);
    _enable();
    return data;
}

BYTE writeSRAM(WORD ofs, BYTE value)
{
    BYTE page = (ofs>>8);
    ofs &= 255;
    _disable();
    outp(0xC00, page);
    outp(0x800 + ofs, value);
    _enable();
    
    return readSRAM(ofs);
}
 
sram or flash? if its sram it will be erased on each boot. seems odd to me.

your read + write code is the same. Whats missing is an write enable.
Most old parallel flash chips have 3 control regs, chip select, output enable and write enable and are usually active low.

so to read, you'd drive CS + OE low and WE would be high.
to write, you'd drive CS + WE low and OE would be high.

Your write code or your read code is just sending a value to a port. to me it looks like your just loading the data lines + address lines.

how are you controlling CS/WE/OE?

I've never seen a 'write protected' SRAM on old hardware.

Whats the ID on the SRAM chip?
 
Several possibilities:

Some AT-era systems protected the SRAM (64 bytes in the "CMOS" RTC), so that you had to unlock it demolish your CMOS settings. I don't know if that's the case here.

It could also be that you're dealing with an NVRAM chip that requires a "store" command before anything's committed permanently.
 
BloodyCactus said:
sram or flash? if its sram it will be erased on each boot. seems odd to me.

your read + write code is the same. Whats missing is an write enable.
Most old parallel flash chips have 3 control regs, chip select, output enable and write enable and are usually active low.

so to read, you'd drive CS + OE low and WE would be high.
to write, you'd drive CS + WE low and OE would be high.

Your write code or your read code is just sending a value to a port. to me it looks like your just loading the data lines + address lines.

how are you controlling CS/WE/OE?

I've never seen a 'write protected' SRAM on old hardware.

Whats the ID on the SRAM chip?
Click to expand...
Thanks for the input!
I'm really not sure about anything, just trying to figure out what's going on and why it's not working by analyzing the code. I just went with what little documentation I was able to find.
The readme for the asset tag utility that I have states this:
The serial number is stored in battery backed-up CMOS RAM and may be lost if the system's battery fails. Otherwise, the serial number should not be modified.
Click to expand...
I'm not sure if this RAM is on the BIOS chip itself or on a seperate chip. I will check the board and see if I can find anything.

There are 2 functions used, one for reading/writing the first 128 bytes of CMOS data, and another for reading extended CMOS data past 128 bytes. There's also an address check in there which sets CF and returns if an address larger than 8k is requested.

Having to use a write enable makes sense I guess, but I don't see anything like that in the util code, nor in the bios function it calls. There's really only a couple 100 lines of relevant asm code to it as far as I can tell.
The utility checks for a signature just past the system configuration data pointer from int 15h/C0h. If the signature matches, it reads the address of the BIOS function it will use to read or write the serial/tag info, from a table past this signature.
The BIOS function itself supports a bunch of functions, not sure what they all do yet but the relevant function checks if AH=E6h for doing tag stuff, read 16 bytes from "CMOS RAM" offset 1CB4h if AL=0, write if AL=1. I don't see anything different between the reading/writing function other than tghe read func doing an IN and the write func doing an OUT to the same port as the read func would.
After writing, it sums the 32 bytes where the serial and asset are stored and stores this in the byte right after, again using the same _writeSRAM function that I pasted in my first post.

It's not that much code so I'll just paste the relevant bits here, maybe I'm missing something.
_ASTBiosFunc is the function that's called by the asset tag utility, with AX=E601h when it tries to update the tag.
All labels are my interpretation of what's going on, if that wasn't clear.
Code: 
BIOS_F:3AC5 _ASTBiosFunc    proc far
BIOS_F:3AC5                 cli
BIOS_F:3AC6                 push    ds
BIOS_F:3AC7                 push    si
BIOS_F:3AC8                 push    cx
BIOS_F:3AC9                 mov     si, 0
BIOS_F:3ACC                 mov     ds, si
BIOS_F:3ACE                 assume ds:nothing
BIOS_F:3ACE                 mov     cl, ah
BIOS_F:3AD0                 cmp     ah, 0F0h ; '='
BIOS_F:3AD3                 jnz     short loc_F3ADB
BIOS_F:3AD5                 call    sub_F3B62
BIOS_F:3AD8                 jmp     loc_F3B5B
; Cut a bunch of checks for other AH values
BIOS_F:3B3A                 cmp     ah, 0E5h ; 's'
BIOS_F:3B3D                 jnz     short funcE6
BIOS_F:3B3F                 call    _doSerial
BIOS_F:3B42                 jmp     short loc_F3B5B
BIOS_F:3B44 funcE6:                                 ; CODE XREF: _ASTBiosFunc+78j
BIOS_F:3B44                 cmp     ah, 0E6h ; 'µ'  ; Write tag if al=1
BIOS_F:3B47                 jnz     short loc_F3B4E
BIOS_F:3B49                 call    _doAssetTag
BIOS_F:3B4C                 jmp     short loc_F3B5B
; Cut some more irrelevant code
BIOS_F:3B58 loc_F3B58:                              ; CODE XREF: _ASTBiosFunc+8Cj
BIOS_F:3B58                 mov     al, 81h ; 'ü'
BIOS_F:3B5A                 stc
BIOS_F:3B5B
BIOS_F:3B5B loc_F3B5B:                              ; CODE XREF: _ASTBiosFunc+13j
BIOS_F:3B5B                                         ; _ASTBiosFunc+1Ej ...
BIOS_F:3B5B                 pop     cx
BIOS_F:3B5C                 pop     si
BIOS_F:3B5D                 pop     ds
BIOS_F:3B5E                 assume ds:nothing
BIOS_F:3B5E                 sti
BIOS_F:3B5F                 retf    2
BIOS_F:3B5F _ASTBiosFunc    endp


BIOS_F:3CC3 _doAssetTag     proc near               ; CODE XREF: BIOS_F:16B6p
BIOS_F:3CC3                                         ; _ASTBiosFunc+84p
BIOS_F:3CC3                 push    si
BIOS_F:3CC4                 push    cx
BIOS_F:3CC5                 mov     si, 3D95h
BIOS_F:3CC8                 mov     ch, cs:[si+21h] ; byte 16 at this address, length?
BIOS_F:3CCC                 mov     dx, 1CB4h
BIOS_F:3CCF                 cmp     al, 1
BIOS_F:3CD1                 jnz     short @method0
BIOS_F:3CD3                 call    _writeSerialOrAssetTag
BIOS_F:3CD6                 jmp     short @method1done
BIOS_F:3CD8 ; ---------------------------------------------------------------------------
BIOS_F:3CD8
BIOS_F:3CD8 @method0:                               ; CODE XREF: _doAssetTag+Ej
BIOS_F:3CD8                 call    _readSerialOrAssetTag
BIOS_F:3CDB
BIOS_F:3CDB @method1done:                           ; CODE XREF: _doAssetTag+13j
BIOS_F:3CDB                 pop     cx
BIOS_F:3CDC                 pop     si
BIOS_F:3CDD                 retn
BIOS_F:3CDD _doAssetTag     endp


BIOS_F:3CDE _readSerialOrAssetTag proc near         ; CODE XREF: _doSerial:loc_F3CBDp
BIOS_F:3CDE                                         ; _doAssetTag:@method0p
BIOS_F:3CDE                 xor     cl, cl          ; CH=length, ES:BX=dest, DX=offset
BIOS_F:3CE0
BIOS_F:3CE0 loc_F3CE0:                              ; CODE XREF: _readSerialOrAssetTag+18j
BIOS_F:3CE0                 call    _readCMOSorSRAM
BIOS_F:3CE3                 mov     es:[bx], al
BIOS_F:3CE6                 inc     dx
BIOS_F:3CE7                 inc     bx
BIOS_F:3CE8                 inc     cl
BIOS_F:3CEA                 cmp     cl, ch
BIOS_F:3CEC                 jb      short loc_F3CF4
BIOS_F:3CEE                 mov     byte ptr es:[bx], 0
BIOS_F:3CF2                 jmp     short loc_F3CF8
BIOS_F:3CF4 ; ---------------------------------------------------------------------------
BIOS_F:3CF4
BIOS_F:3CF4 loc_F3CF4:                              ; CODE XREF: _readSerialOrAssetTag+Ej
BIOS_F:3CF4                 cmp     al, 0
BIOS_F:3CF6                 jnz     short loc_F3CE0
BIOS_F:3CF8
BIOS_F:3CF8 loc_F3CF8:                              ; CODE XREF: _readSerialOrAssetTag+14j
BIOS_F:3CF8                 clc
BIOS_F:3CF9                 retn
BIOS_F:3CF9 _readSerialOrAssetTag endp


BIOS_F:3CFA _writeSerialOrAssetTag proc near        ; CODE XREF: _doSerial+10p
BIOS_F:3CFA                                         ; _doAssetTag+10p
BIOS_F:3CFA                 pusha                   ; CH=length, ES:BX=src, DX=target offset
BIOS_F:3CFB                 mov     cl, ch
BIOS_F:3CFD                 xor     ch, ch
BIOS_F:3CFF                 inc     cx
BIOS_F:3D00
BIOS_F:3D00 @checkLength:                           ; CODE XREF: _writeSerialOrAssetTag+Ej
BIOS_F:3D00                 mov     al, es:[bx]
BIOS_F:3D03                 inc     bx
BIOS_F:3D04                 cmp     al, 0
BIOS_F:3D06                 jz      short @lengthOk
BIOS_F:3D08                 loop    @checkLength
BIOS_F:3D0A                 popa
BIOS_F:3D0B                 jmp     short @error
BIOS_F:3D0D ; ---------------------------------------------------------------------------
BIOS_F:3D0D
BIOS_F:3D0D @lengthOk:                              ; CODE XREF: _writeSerialOrAssetTag+Cj
BIOS_F:3D0D                 popa
BIOS_F:3D0E                 xor     cl, cl
BIOS_F:3D10
BIOS_F:3D10 @writeLoop:                             ; CODE XREF: _writeSerialOrAssetTag+2Ej
BIOS_F:3D10                 mov     al, es:[bx]
BIOS_F:3D13                 call    _writeCMOSorSRAM
BIOS_F:3D16                 call    _readCMOSorSRAM
BIOS_F:3D19                 cmp     es:[bx], al
BIOS_F:3D1C                 jnz     short @error
BIOS_F:3D1E                 inc     dx
BIOS_F:3D1F                 inc     bx
BIOS_F:3D20                 inc     cl
BIOS_F:3D22                 cmp     cl, ch
BIOS_F:3D24                 jnb     short @done
BIOS_F:3D26                 cmp     al, 0
BIOS_F:3D28                 jnz     short @writeLoop
BIOS_F:3D2A
BIOS_F:3D2A @done:                                  ; CODE XREF: _writeSerialOrAssetTag+2Aj
BIOS_F:3D2A                 call    _checksumAssetAndSerial
BIOS_F:3D2D                 clc
BIOS_F:3D2E                 jmp     short @noError
BIOS_F:3D30 ; ---------------------------------------------------------------------------
BIOS_F:3D30
BIOS_F:3D30 @error:                                 ; CODE XREF: _writeSerialOrAssetTag+11j
BIOS_F:3D30                                         ; _writeSerialOrAssetTag+22j
BIOS_F:3D30                 stc
BIOS_F:3D31
BIOS_F:3D31 @noError:                               ; CODE XREF: _writeSerialOrAssetTag+34j
BIOS_F:3D31                 retn
BIOS_F:3D31 _writeSerialOrAssetTag endp


BIOS_F:333E _writeCMOSorSRAM proc near              ; CODE XREF: BIOS_F:169Ep
BIOS_F:333E                                         ; sub_F2C3C+9Dp ...
BIOS_F:333E                 cmp     dx, 1FFFh       ; Write AL to CMOS/SRAM offset DX
BIOS_F:3342                 jbe     short @addressOk
BIOS_F:3344                 stc
BIOS_F:3345                 jmp     short @invalidAddress
BIOS_F:3347 ; ---------------------------------------------------------------------------
BIOS_F:3347
BIOS_F:3347 @addressOk:                             ; CODE XREF: _writeCMOSorSRAM+4j
BIOS_F:3347                 push    dx
BIOS_F:3348                 push    ax
BIOS_F:3349                 cmp     dx, 80h ; 'Ç'
BIOS_F:334D                 jb      short @writeCMOS
BIOS_F:334F                 call    _writeSRAM
BIOS_F:3352                 jmp     short @done
BIOS_F:3354 ; ---------------------------------------------------------------------------
BIOS_F:3354
BIOS_F:3354 @writeCMOS:                             ; CODE XREF: _writeCMOSorSRAM+Fj
BIOS_F:3354                 mov     ah, dl
BIOS_F:3356                 xchg    al, ah
BIOS_F:3358                 call    _writeCMOS
BIOS_F:335B
BIOS_F:335B @done:                                  ; CODE XREF: _writeCMOSorSRAM+14j
BIOS_F:335B                 pop     ax
BIOS_F:335C                 pop     dx
BIOS_F:335D                 clc
BIOS_F:335E
BIOS_F:335E @invalidAddress:                        ; CODE XREF: _writeCMOSorSRAM+7j
BIOS_F:335E                 retn
BIOS_F:335E _writeCMOSorSRAM endp


BIOS_F:335F _readCMOSorSRAM proc near               ; CODE XREF: BIOS_F:16A2p
BIOS_F:335F                                         ; sub_F2C3C+40p ...
BIOS_F:335F                 cmp     dx, 1FFFh       ; Read CMOS/SRAM offset DX into AL
BIOS_F:3363                 jbe     short loc_F3368
BIOS_F:3365                 stc
BIOS_F:3366                 jmp     short locret_F3381
BIOS_F:3368 ; ---------------------------------------------------------------------------
BIOS_F:3368
BIOS_F:3368 loc_F3368:                              ; CODE XREF: _readCMOSorSRAM+4j
BIOS_F:3368                 push    dx
BIOS_F:3369                 push    ax
BIOS_F:336A                 cmp     dx, 80h ; 'Ç'
BIOS_F:336E                 jb      short @readCMOS
BIOS_F:3370                 call    _readSRAM
BIOS_F:3373                 jmp     short loc_F337A
BIOS_F:3375 ; ---------------------------------------------------------------------------
BIOS_F:3375
BIOS_F:3375 @readCMOS:                              ; CODE XREF: _readCMOSorSRAM+Fj
BIOS_F:3375                 mov     al, dl
BIOS_F:3377                 call    _readCMOS
BIOS_F:337A
BIOS_F:337A loc_F337A:                              ; CODE XREF: _readCMOSorSRAM+14j
BIOS_F:337A                 mov     dl, al
BIOS_F:337C                 pop     ax
BIOS_F:337D                 mov     al, dl
BIOS_F:337F                 pop     dx
BIOS_F:3380                 clc
BIOS_F:3381
BIOS_F:3381 locret_F3381:                           ; CODE XREF: _readCMOSorSRAM+7j
BIOS_F:3381                 retn
BIOS_F:3381 _readCMOSorSRAM endp


BIOS_F:3382 _writeCMOS      proc near               ; CODE XREF: _writeCMOSorSRAM+1Ap
BIOS_F:3382                 pushf                   ; Write byte in AH to CMOS offset AL
BIOS_F:3383                 cli
BIOS_F:3384                 test    cs:byte_FFFE0, 8
BIOS_F:338A                 jnz     short @noDisableNMI
BIOS_F:338C                 or      al, 80h         ; Disable NMIs
BIOS_F:338E
BIOS_F:338E @noDisableNMI:                          ; CODE XREF: _writeCMOS+8j
BIOS_F:338E                 out     70h, al         ; Select CMOS RAM index
BIOS_F:3390                 mov     al, ah
BIOS_F:3392                 out     71h, al         ; Write byte
BIOS_F:3394                 popf
BIOS_F:3395                 retn
BIOS_F:3395 _writeCMOS      endp


BIOS_F:3396 _readCMOS       proc near               ; CODE XREF: _readCMOSorSRAM+18p
BIOS_F:3396                 pushf                   ; Read CMOS offset AL into AL
BIOS_F:3397                 cli
BIOS_F:3398                 test    cs:byte_FFFE0, 8
BIOS_F:339E                 jnz     short @noDisableNMI
BIOS_F:33A0                 or      al, 80h         ; Disable non maskable interrupts
BIOS_F:33A2
BIOS_F:33A2 @noDisableNMI:                          ; CODE XREF: _readCMOS+8j
BIOS_F:33A2                 out     70h, al         ; Select CMOS RAM index
BIOS_F:33A4                 in      al, 71h         ; Read byte
BIOS_F:33A6                 popf
BIOS_F:33A7                 retn
BIOS_F:33A7 _readCMOS       endp


BIOS_F:33A8 _writeSRAM      proc near               ; CODE XREF: _writeCMOSorSRAM+11p
BIOS_F:33A8                 pushf                   ; Select SRAM page and write AL at offset DX
BIOS_F:33A9                 cli
BIOS_F:33AA                 push    bx
BIOS_F:33AB                 push    ax
BIOS_F:33AC                 mov     ax, dx
BIOS_F:33AE                 xor     dx, dx
BIOS_F:33B0                 mov     bx, 100h
BIOS_F:33B3                 div     bx
BIOS_F:33B5                 push    dx
BIOS_F:33B6                 mov     dx, 0C00h       ; Select SRAM page
BIOS_F:33B9                 out     dx, al
BIOS_F:33BA                 pop     dx
BIOS_F:33BB                 add     dx, 800h
BIOS_F:33BF                 pop     ax
BIOS_F:33C0                 out     dx, al          ; Write SRAM byte
BIOS_F:33C1                 pop     bx
BIOS_F:33C2                 popf
BIOS_F:33C3                 retn
BIOS_F:33C3 _writeSRAM      endp


BIOS_F:33C4 _readSRAM       proc near               ; CODE XREF: _readCMOSorSRAM+11p
BIOS_F:33C4                 pushf                   ; Select SRAM page and read byte at offset DX into AL
BIOS_F:33C5                 cli
BIOS_F:33C6                 push    bx
BIOS_F:33C7                 mov     ax, dx
BIOS_F:33C9                 xor     dx, dx
BIOS_F:33CB                 mov     bx, 100h
BIOS_F:33CE                 div     bx              ; DX=offset AX=page
BIOS_F:33D0                 push    dx
BIOS_F:33D1                 mov     dx, 0C00h       ; 0C00h = page register to write to SRAM or I/O
BIOS_F:33D4                 out     dx, al
BIOS_F:33D5                 pop     dx
BIOS_F:33D6                 add     dx, 800h        ; 0800h = I/O port access registers for extended CMOS RAM or SRAM
BIOS_F:33DA                 in      al, dx          ; Read SRAM byte
BIOS_F:33DB                 pop     bx
BIOS_F:33DC                 popf
BIOS_F:33DD                 retn
BIOS_F:33DD _readSRAM       endp


BIOS_F:3D73 _checksumAssetAndSerial proc near       ; CODE XREF: BIOS_F:16B2p
BIOS_F:3D73                                         ; _writeSerialOrAssetTag:@donep
BIOS_F:3D73                 mov     dx, 1CA4h
BIOS_F:3D76                 mov     cx, 20h ; ' '
BIOS_F:3D79                 xor     bx, bx
BIOS_F:3D7B
BIOS_F:3D7B @checksumLoop:                          ; CODE XREF: _checksumAssetAndSerial+Ej
BIOS_F:3D7B                 call    _readCMOSorSRAM
BIOS_F:3D7E                 add     bl, al
BIOS_F:3D80                 inc     dx
BIOS_F:3D81                 loop    @checksumLoop
BIOS_F:3D83                 inc     bl
BIOS_F:3D85                 mov     al, bl
BIOS_F:3D87                 call    _writeCMOSorSRAM
BIOS_F:3D8A                 clc
BIOS_F:3D8B                 retn
BIOS_F:3D8B _checksumAssetAndSerial endp
 
Chuck(G) said:
Several possibilities:

Some AT-era systems protected the SRAM (64 bytes in the "CMOS" RTC), so that you had to unlock it demolish your CMOS settings. I don't know if that's the case here.

It could also be that you're dealing with an NVRAM chip that requires a "store" command before anything's committed permanently.
Click to expand...
I just tried updating a byte in the first 128 bytes of the CMOS data using this function (a C version of the code in the BIOS):
Code: 
BYTE writeCMOS(WORD ofs, BYTE value)
{
    _disable();
    if (ofs>=128) {
        return -1;
    }
    outp(0x70, ofs | 0x80);
    outp(0x71, value);
    return readCMOS(ofs); // Just to verify the written value
}
That worked fine, no write enable or anything needed. It seems it was written permanently too, because I didn't update the checksum and it gave an error and reset the settings to their default values when I rebooted.

So writing to addresses <128 using ports 70h/71h works. >=128 using the mapping method doesn't.
Reading from or writing to addresses <128 using the mapping method doesn't work either for that matter, just returns 0xFF everywhere.
I don't know if the data below 128 and past 128 are on the same chip? If they are that probably rules out a faulty chip.
It is kind of strange that ASTs own code does not work though, the system seems to be functioning fine otherwise.
 
oh if its just ram in the RTC/cmos chip, find the chip and look up its datasheet. a lot of RTC have a small amount of storage.
 
BloodyCactus said:
oh if its just ram in the RTC/cmos chip, find the chip and look up its datasheet. a lot of RTC have a small amount of storage.
Click to expand...
The RTC is a BQ3285Q, according to the datasheet it has "114 bytes of general nonvolatile storage". Which matches what I'm seeing with my code, anything past 113 reads as 0FFh.
So I guess I should be looking at accessing the 8k chip, no idea how I'm going to accomplish that though when the code I have doesn't do it.
I do have a second (currently dead) board with most likely a different BIOS version, maybe I should try and swap in that BIOS and see what the code looks like on that one and see if that gives me any more info.
 
Two things to also check

1. Is there a write protect jumper somewhere on the board that would match up to this ? You may have to trace it as it's quite likely to be one of those 'factory configured do not alter' ones AST manuals are full of. If it's actually updating the BIOS flash itself then it might need the BIOS write protect off. I would however be very careful playing with that unless you have a copy of the BIOS image and know you can update it somehow.

2. You may well find even when things work you need to use the BIOS. It's not uncommon for things like flash to have the write locked to the BIOS space. At least its an old enough machine it's not locked to SMM mode.

I wouldn't assume the 6264 is necessarily for this. It would be kind of odd in fact as you'd need a fair bit more battery backup and also a power management ic. More likely the 6264 is there because the flash ROM is slow as molasses and copies itself into RAM at boot or is acting as a general cache.
 
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