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Shugart SA800 Theory of Operations question

cr1901

cr1901

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I offered to write a technical document on floppy drive theory of operation for preservation purposes. As part of my documentation, I wish to include circuit models for the R/W head as it is passed through various amplifiers and filters. I chose to discuss the Shugart SA800 because there exists copious documentation for the drive.

I have the schematic diagram for the drive including from this link, page 39: http://deramp.com/downloads/floppy_drives/shugart/SA-80x Maintenance Manual.pdf
And a circuit model for the R/W head is provided here, page 21, figure 28: http://www.mirrorservice.org/sites/...64-0_SA800_801_Theory_of_Operations_Apr76.pdf

Neither of these are quite in depth as I was trying to get. The diagrams in Section 4 of Theory of Operations, provide a nice model for how flux transitions are written and read for a ring magnet and a single coil. However, a real Shugart drive uses two coils, and during a read only one of each coil is active for a given direction of magnetism on the disk surface.

I'm having trouble understanding how the provided R/W circuit model works; I'm not certain how the floppy disk is capable of only inducing a current through one of the coils at a time when the whole head would be exposed to the change in magentic flux. The diodes which connect directly to the head coils from the read amplifier (page 39) are also limiting my understanding b/c an induced voltage will reverse-bias the diodes and STOP current flow. I suspect the knowing way that the R/W head coils are wired would make understanding. I also suspect that I've forgotten how to use Faraday's Law properly XD.

Is anyone familiar with floppy drive physics or is familiar with how R/W heads were typically manufactured? It seems that fully understanding this circuit is dependent on knowing how both coils are oriented. I SUSPECT they are in the same position and just wound in two different directions. Or maybe my analog electronics needs work.
 
Exactly. Since bit boundaries are dictated by reversals in magnetization direction, it's easier and more straightforward to swap coils than to reverse the direction of current flow in a single coil. Note that the input to the write circuit of a floppy usually drives a flip-flop configured as a "T" (toggle) type.
 
krebizfan said:
Check out the revised Theory of Operations dated May 1978 which describes the usage of the 3 coils in detail on page 21. http://bitsavers.informatik.uni-stuttgart.de/pdf/shugart/SA8xx/ the file with TheorOp in the name.

To put it simply, the SA-800 switches the write heads for every bit.
Click to expand...

The relevant section seems identical to the 1976 version. How the floppy drive can control which coil is used for writes makes sense to me; just swap coils (assuming the induced voltage that occurs during the coil swap has negligible effect on the write circuitry).

<physics>However for reads, I would expect a voltage to be induced into BOTH coils in accordance w/ Lenz's Law</physics>. But somehow the floppy drive is able to ensure only one coil is used (ie carries current) at a time. I GUESS that's what the diodes that connect to the read circuitry ensure.

Are you and ChuckG saying that a similar control scheme applies for reads as well?

For convenience, I've uploaded the Read Circuitry schematic:

jwzLm9K.png

FMMF4Cj.png
 
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Al Kossow said:
There is a detailed Shugart design document describing the read channel design on bitsavers.
Click to expand...

I wasn't aware of this. The schematic I used is from the SA800 Maintenance/Troubleshooting manual. Do you perhaps remember what it's called or where to look for it?
 
Also, in case anyone is wondering; the reason I wanted to model the R/W heads is so I can simulate what happens when two flux transitions are too close together; I'm guessing the R/W head low-pass filters the input voltage to make the output signal corrupted, so zero crossings (prior to being input to the initial diff amplifier) don't happen when they're supposed to.
 
cr1901 said:
the reason I wanted to model the R/W heads is so I can simulate what happens when two flux transitions are too close together
Click to expand...

This will be a fun simulation to study. You'll see why write precomp was used. When pulses are close, the induced current from the previous flux has not decayed to zero by the time the next reversal is reached. This moves the point in time at which the new flux reversal causes peak output in the amplifier since the reversal did not start at "zero."

Mike
 
Chuck(G) said:
Another curious effect of "bit crowding" is that it can actually shift the domain wall of a bit already written.
Click to expand...
Do you know of a paper (or the name of this particular phenomenon) that I can read so perhaps I can incorporate it into my model? I'm sadly not a materials person and would like to keep the model simple.

So far, I'm assuming an infinitely long (x), negligible width (z) material with a depth (y) that does not affect the magnetic field lines. The R/W head sits above the material and the material has a velocity in the x-direction; think of a circle that is so large that a small arc is essentially a straight line.

I'm guessing the documentation that EEs compiled when engineering floppy disk material back in the 60's are now lost, so I'll have to create a less-precise (but sufficient) model.
 
cr1901 said:
I'm guessing the documentation that EEs compiled when engineering floppy disk material back in the 60's are now lost, so I'll have to create a less-precise (but sufficient) model.
Click to expand...

The person you want to talk to is Shrikant Desai
http://www.vintage.org/2007/main/bio.php?id=1774

When Shugart shut down, he was the person who got their documentation, though it was all given away to Sellam or the Computer History Museum.
 
Al Kossow said:
The person you want to talk to is Shrikant Desai
http://www.vintage.org/2007/main/bio.php?id=1774

When Shugart shut down, he was the person who got their documentation, though it was all given away to Sellam or the Computer History Museum.
Click to expand...

I will see if I can get into contact with him soon; I'd like to get my notes in order first. If the Computer History Museum has the documentation, well that's fine too. I mean, they did restore (part of) a RAMAC after all, so I think I can trust their dedication to preservation/restoration :p.

In any case, this is the document I was looking for I believe: http://www.mirrorservice.org/sites/...ecs/SA850_450_Read_Channel_Analysis_Dec79.pdf. Not gonna ask how you got your hands on it Al, but from a cursory glance, it's the document I need in the interim.
 
IBM has some interesting pieces of development of floppy read/write heads in their Journal if you are not focused solely on Shugart. Look at patents from IBM, Burroughs, and Shugart as well for more explanations of detailed operation.
 
deramp5113 said:
This will be a fun simulation to study. You'll see why write precomp was used. When pulses are close, the induced current from the previous flux has not decayed to zero by the time the next reversal is reached. This moves the point in time at which the new flux reversal causes peak output in the amplifier since the reversal did not start at "zero."

Mike
Click to expand...

I have stopped trying to do a full simulation b/c my electromagnetics needs work and I do not have the time to sit down and work through some problems. Is the current not going to zero actually due to the R/W head's bandwidth/step response*, or b/c the magnetic domains are literally too close together/interfering (i.e. flux isn't decaying)? Maybe both?

Does write precompensation increase the write magnetic field strength of the R/W head, writes the data early to offset the poor step response, or both?

*step response b/c I assume that the current is tending toward zero even while the magnetic flux is relatively stationary.
 
cr1901 said:
I have stopped trying to do a full simulation b/c my electromagnetics needs work and I do not have the time to sit down and work through some problems. ...
Click to expand...

Magnetic simulations can be very tricky, since the full story of what is going on is not completely represented by the electronic schematic. Look at US patent number 4459653 for an example of a circuit and magnetic device (called a 'transfluxer' for the use of transverse flux to saturate a portion of a magnetic yoke) where the electronic and magnetic circuits are interdependent, and a thorough knowledge of what is happening in the magnetic circuit is absolutely required before the electronic circuit can be understood. R/W heads are transformers of a sort, and their magnetic characteristics are modified by the magnetic domains on the disk's surface, much like how the varying transformer coupling of two coils is used by metal detectors.

Back when I worked at GE, and played around with the then-still-actively-patented transfluxer (and later bifluxer) inverters for ballasts, the engineering for straight magnetic ballasts for high-intensity discharge arc lamps was still being done by hand, but the engineers were transitioning to a finite-element analysis method for figuring the magnetic circuits required for current-regulating ballasts.
 
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cr1901 said:
Do you know of a paper (or the name of this particular phenomenon) that I can read so perhaps I can incorporate it into my model? I'm sadly not a materials person and would like to keep the model simple.
Click to expand...
I found this paper an informative answer to my question.

In any case, I do have another question; after the data and clock pulses are separated into the actual data and windows, they need to somehow be fed into a deserializer and then a data register. How would I go about designing such a serializer? Would I use the 8MHz "system" clock to latch the deserialized data into a data register, or the next clock pulse that comes from the floppy drive? This seems to vary from controller to controller; Shugart's SA100 TheoryOps manual has a block diagram on page 26, that states that it expects a controller to handle deserialization using the raw data (?), and both the separated data and clock signals. On the other hand, the block diagram on page 5 of TI's TMS279X datasheet shows that various components of the LSI floppy controller can operate solely on the raw floppy read data signal, including the track registers and the ALU!

Problems I can think of include:
  • The clock pulse precedes the data pulse for a given bit cell, and so the edge of the recovered clock cannot be used to clock the shift register with the incoming data, since the data hasn't arrived yet from the data separator output's POV!
  • The data pulse does not extend until the end of the bit cell, and therefore will not be present at the shift register's input when the clock pulse signaling the start of the next bit cell arrives (hold/setup time violation. I assume the correct solution to this is to use a flip-flop that detects a data pulse and then holds the data until the next clock pulse arrives?
 
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