I spent a significant amount of time looking into this with my own TL/3. I'd validated that the necessary lines are present out to the DB25 connector, but some issue yet prevents whatever check the Xircom software does from "seeing" the adapter. Logic-level probing, or disassembly of the relevant Xircom software routines might be appropriate next-steps.
It's worth noting that the specific PSSJ used in the TL/3 wasn't used in any other system. It wouldn't be unreasonable to think there might be a bug or fault in that version of the chip.
For my part, I'd lost interest in pursuing the issue further. Where I can just pull the CF card for large data transfers, and where I have a "PiModem" connected to the serial port for all internet-related connectivity besides, using the Xircom adapter would have been superfluous.
The setup programs for the TL/3 and RLX systems behave slightly differently than those of the earlier systems. Rather than provide command-line switches, key combinations are used from within the utility instead.
This isn't documented anywhere that I'm aware of, so, for the sake of posterity:
Code:
SETUPTL3
--------
Alt-u BIOS/ROM DOS Setup
Alt-a Advanced BIOS/ROM DOS Setup
Alt-b EEPROM Registers
Alt-s Update/Save Setup Information
I'll mention that the "Input Clock" setting under the Advanced setup page just configures additional I/O cycle wait-states, via corresponding modifications to bits 2 and 3 of EEPROM word 14. The implication here is that swapping the stock 40MHz crystal and 10MHz 286 for a 64MHz crystal and 16MHz 286, and then selecting the "Reserved" setting, would remain a supported configuration.
Code:
8MHz Port FFEC: 82h, EEPROM Word 14, bits 2 - 3: 00
10MHz Port FFEC: 86h, EEPROM Word 14, bits 2 - 3: 01
12MHz Port FFEC: 8Ah, EEPROM Word 14, bits 2 - 3: 10
Reserved Port FFEC: 8Eh, EEPROM Word 14, bits 2 - 3: 11
Outside of using the advanced setup options, or modifying the relevant EEPROM bits directly, the various wait-states can also be set on-the-fly via relevant writes to port FFEC, as referenced above. Most of the Tandy systems that I've worked with noticeably benefit from a zero wait-state configuration (80h).
Code:
SETUPRLX (both versions)
------------------------
Alt-u BIOS/ROM DOS Setup
Alt-b EEPROM Registers
Alt-s Update/Save Setup Information
There's no "Advanced" screen in the RLX setup utilities, but the applicable EEPROM bits can still be changed. Here's a partial mapping concerning enabling/disabling some of the built-in peripherals:
Code:
Word 13, Bit 8 - Hard Disk Chip Select - Disabled: 0, Enabled: 1
Word 13, Bit 9 - Parallel Port Chip Select - Disabled: 0, Enabled: 1
Word 13, Bit A - Video Port Chip Select - Disabled: 0, Enabled: 1
Word 13, Bit B - Floppy Disk Port Chip Select - Disabled: 0, Enabled: 1
Word 13, Bit C - Serial Port Chip Select - Disabled: 0, Enabled: 1
Word 13, Bit F - Parallel Port Mode - Enhanced: 0, Normal: 1
And no, in case anyone wonders, disabling the onboard XTA interface via that relevant bit still doesn't allow an RLX-B to initialize properly with the XTIDE Universal BIOS, sans XTA drive.