Hay, thanks for your reply. Yes I know about some of the L1M20 bios (firmware) limitations. At one time there was a driver for PCOS and other operating systems for the L1M20, that would let you use more than 512K. Unfortunately nobody keep any clean archive copies of it. The original RAMDISK driver, nobody seems to keep, the same for any 3Rd parity EMS memory boards for the L1M20. As far as bios upgrade any version of a machine that has 41128 or 4256 drams on the motherboard that support memory to at least 640K should work. (AkA ! base memory of 256K in two 128K banks or 512K on board in two 256K banks.)
Bios Firmware greater than 2.0F. Probably any BIOS from after the (APB8086) was released should probably give you up to 640K plus under MS-DOS. (I have noted elsewhere about a MS-DOS, CP/M memory patch).
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As far as older PCOS versions are concerned, If it is from a Olivetti M24 PC compatible, yes it should see more than 512K, But the hardware in a olivetti M24 PC is different from a L1M2x so it would have to be patched. Onboard firmware code copied and patch for hardware differences. PCOS versions above 4.8 for the L1M20 support it. With CP/M 8K we just patched another driver form a different CP/M 8K that supported more than 512K.
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In your message you did not state what PCOS version or CP/M 8K you are using or if you have a intel x86 coprocessor card (APB8086). Depending on the OS this will affect the addressing region that would have to be patch, (due to the os version different locations).
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The method most use in Latin America is to re cross-compiler, or use microprocessor converters utilities to convert the patch for old versions of MS-dos and CP/M86 to see more than 256K or 512K of memory.
Their used to be microprocessor converters utilities that could port a PC-dos X86 executables and files to/and from a CP/M 86 version. Then convert a CP/M86 to a CP/M 8K or PCOS version.
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Most of the larger L1M series we have still in service use a different os. A UNIX/XENIX clone, Or their other os that will still run PCOS applications. MP/MN 8K with the GSX extensions installed. Other then a time crunch their could be some possible legal issues for me to disassemble a complete OS back to source code (, for none client related work).
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As for the BIOS actually check for SEGT trap issues on segment 7 during POST, yes but that can be redirected. Some Bus adapter boards did that for the L1M20 in hardware. On the L1M20, its Memory Management Unit a 82S181 PROM has a enable/disable input pin. This pin number 18 is a input signal used by the /MEMDIS signal from the systems expansion bus to disable or enable the MM PROM. The rest of the hardware on adapter board other then the I/O logic the just watches for SEGT trap issues on segment 7 with the correct microprocessor status cycles and then switches the overlay on or off.
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The Olivetti L1M20 is a easier system to add memory to it over the 512k region than the a IBM PC to support more conventional memory than 640K of base memory. IBM did not put the full Intel microprocessor status cycles signals lines on to the ISA Bus. Companies like MICROWay used a custom programed MCU as a MMU to support DOS conventional memory to 1016M. It also emulated the missing Intel signal pins, read the microprocessors instructions (for the correct code segment page and etc). Some other manufactures memory board had extra leads that you had to reattached to the PC's intel microprocessor corresponding pins. Normally it is the pins for A16/S3, A17/S4, A18/S5, A19/S6, so the board can see the full microprocessor code and status cycles). At least Olivetti had the smarts to include them on their expansion bus (, unlike IBM)
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I have noted this to you for the fact that you could convert a bus adapter to do so it needed. Note that the Intel x86 coprocessor (APB8086) board/card uses a different address then on the Olivetti M24 PC. The ISA adapter for the L1M20 normally found on line is quite buggy/limited, so if you do not have any bus conflicts, I would wire a direct 16-bit ISA bus-to-bus adapter with address translations for the L1M20 and M24 PC. To note the address translations in this posting would take up some space and time to retype/scan. The old MS-dos files for the external Ebios.sys, EGA emulation, ANSI Emulation extension for the Intel X86 card can no longer be relocated online. The
Olivetti M21 & M24 Theory Of Operation is available for downloading. Old L1M20 Address range for the Intel x86 coprocessor (APB8086) was in the 7FXA to 7FXF (hex) range, other ISA card I/O address where repaped somewhere in the 7xxx (Hex) range. The old Ebios.sys remaps other hardware I/O to that range. The Intel 8087 APU adapter board also sat somewhere in that area.
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Since you built your own Olivetti L1M20 clone, I hope this helps point you to a possible solution.