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Wanted: bus correction kit for AT&T 6300 (Olivetti M24)

Thanks for that PROM dump!

Thanks for that PROM dump!

Thanks for that PROM dump, pietja! Good to have that shared and preserved. :D

Unfortunately, I haven't been able to contact keepiru since my last post. It's a shame, since he already made that kit and offered to send it to me. I should have replied earlier.

Oh well, like you said: at least this thread should now contain all the information necessary to recreate a bus correction kit. If only I had the time to work on this further myself... ;-)
 
Just registered with this forum to find out if there are any new updates on this correction kit. There's not much information about it, and as you all have found out about 4 year ago, they are basically impossible to obtain. Has anyone made one they'd be willing to part with? Doing it myself is way over my head at this point.
 
Yeah, I really regret not responding to keepiru's DM earlier. He had made a working version that he offered to send me for free. But after he posted that last "ping" message as a reminder to me (scroll up a bit in this thread), he appears to have gone dark on this forum.

Could someone knowledgeable here perhaps take keepiru's graphical designs (he uploaded them to this thread as attachments) and derive Gerber files or something from this design, so that anybody who wants such a bus correction kit can simply have one etched and sent over at by a PCB manufacturing service? That would really be appreciated. (As far as I understand, all the other required ingredients, such as the GAL dump, can already be found in this thread.)

And keepiru, wherever you are, I hope you are okay. Thanks again for your help with this!
 
digger said:
Yeah, I really regret not responding to keepiru's DM earlier. He had made a working version that he offered to send me for free. But after he posted that last "ping" message as a reminder to me (scroll up a bit in this thread), he appears to have gone dark on this forum.

Could someone knowledgeable here perhaps take keepiru's graphical designs (he uploaded them to this thread as attachments) and derive Gerber files or something from this design, so that anybody who wants such a bus correction kit can simply have one etched and sent over at by a PCB manufacturing service? That would really be appreciated. (As far as I understand, all the other required ingredients, such as the GAL dump, can already be found in this thread.)

And keepiru, wherever you are, I hope you are okay. Thanks again for your help with this!
Click to expand...
I realize this post is more than a year old however:
I recently acquired one of these things an AT&T PC6300.
and would like to build the bus corrector
Any luck getting those KiCad files?
Cheers!
~G
 
Reason: if these materials don't readily exist I'd like to re-create them & don't want to reinvent the wheel.
I'll post the KiCad files to GitHub for posterity
 
Does anyone happen to have those pictures of the board from post 6? photobucket has purged them.

Also, I can sort-of piece together what is going on with this device, thanks to finding a theory of operation manual for the M24 and M21, and the bus backplane board schematic. The PROM chip A0-A3 are connected to an 74LS123 counter. The counter is loaded with 0s on read/write start and then counts up. A4 is connected to the signal for whether it is a 16-bit or 8-bit transfer. As for the outputs of the PROM, D0-D5 go out to a 74LS174 buffer, for controlling the bus, while D6 is connected to one of the enable pins of the 123 through an OR gate, causing the count to stop for long transfers. D7 is connected directly to the other enable pin of the 123, halting the counter when the cycle is completed.

From the look of the dump from the correction board, A7 of their PROM was tied to ground, allowing for the copyright, while A8 toggles between an original timing program, just with the byte order corrected, and shorter, optimized timings. (I haven't plotted out the programs yet to see what the differences are, though I can see the low version has more of the stop state at the end)

Looking at the service manual, the edge connector pins connect to -XMEMW (~XMWR in the schematic) and -XIOW (~XIOW in schematic), and would go to A5 and A6, though I don't know which order currently. (mapping out the output signals for each would probably help)

Theory of operation manual: https://archive.org/details/olivetti-m21-m24-theory-of-operation/
The "Bus Converter Board" section starts on PDF page 110.
 
Aha. I no longer need the pictures. Upon further review of the contents of the program I can see how it all works. There really are only 4 pairs (byte vs word) of sequence programs. 2 for the turbo/magic speed and 2 for the normal speed. Within those, one pair is for write cycles (either -XMEMW or -XIOW being low) and the other for read cycles (both lines being high). In total, there really are only 6 unique sequences, as all the byte access sequences are the same within each of the two speed settings.

The turbo mode doesn't make the bus clock faster, but it does remove some states from the sequence. The 74LS161 counter (I mistyped above) is clocked at 8MHz. For byte cycles, it only removes one cycle that looks like a NOP (out of 3 consecutive). For word cycles, it removes that, plus 2 (read) or 3 (write) other extra cycles. With the bus running at 4MHz, that would be .5-2 bus clock cycles reduction for each bus access. (.5 per byte access, 1.5-2 per word access).
 
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I just realized I still had the old 123 from my original 6300 back in the 80s. (it was stashed in the BIOS 1.43 upgrade kit box, where my dad put it after installing the correction kit. The box also has a bunch of chips that I pulled before the system got sent to the dump a decade or more ago.) I did a dump of it and it matches the listing in the theory of operation manual.

Code: 
0000   F3 F3 F3 DB D8 DC 9C DC  D8 D9 DB D3 D2 D2 92 42
0010   F3 F3 F3 D1 D0 D4 94 D4  44 44 44 44 44 44 44 44
 
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