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Good to include into this discussion. I'm aware of it. I already have it here at home.

I have to admit I'd be extremely interested in any such attempt like this. Yeah, I was also thinking about the reservation station. Just didn't bother mentioning it. I also go back a long ways with MIPS. I worked on a PC board using the MIPS R2000 and had a chance to get two full afternoons of...

I worked at Intel on the P II and the BX chipset. Are you thinking of creating something similar to the instruction decoder that translated CISC into RISC (ROB aka 're-order buffer') with a "retire unit" used to ensure in-order behavior at the end?