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Nice PET but garbage screen

Re: CPU High

Re: CPU High

patscc said:
All of them ?
Is it actually going high as in ~5 V, or does it look like the bus is going into 'third' state and simply disengaging from the bus ?
While this is going on, are you still seeing a stable system clock ?

I don't think the 6502 does HALT. What are the interrupt lines to the processor up to, by the way ?

patscc
Click to expand...

Ok, here is a snap shot of CPU lines when it comes to a stop.

D0-D7 = LO (0.8V) After some power ups, these stop at HI, after others, they stop at LO
AB0-AB7 = HI (3.8V-4.4V) These always seems to go HI
AB8 = 0V
AB9 = HI
AB10 = 0V After some power ups, AB8,10,12,14 go HI as well.
AB11 = HI
AB12 = 0V
AB13 = HI
AB14 = 0V
AB15 = HI

R/W = HI
(IRQ) = HI
CLK = Good
RDY = +5V
SO = +5V
(NMI) = +5V

Philip
 
Rdy

Rdy

If you've got the time, watch the RDY pin on a scope while it's booting. See if does anything wierd. The RDY can essentially latch an address on to the bus during a read, which sounds like what you've got. I'll try to grok the schematic some more after dinner and see what might be messing with the RDY line.

patscc
 
stuck on read

stuck on read

My bad on RDY. I realized later that it only goes to a memory expansion, which presumably you don't have anyway.

With R/W high it looks like it's stuck on a read. If you try to decode the address using your HI-0 V values, I come up with 1010101011111111 , or 0x0AAFF, or 43775 in dec.
What lives there ?
patscc
 
Last edited:
patscc said:
With R/W high it looks like it's stuck on a read. If you try to decode the address using your HI-0 V values, I come up with 1010101011111111 , or 0x0AAFF, or 43775 in dec.
What lives there ?
patscc
Click to expand...

Yikes. I don't know the answer to that. That question is for a Commodore Pet Gonzo :)

If anyone is interested, the entire collection of schematics I'm using is at: http://zimmers.net/anonftp/pub/cbm/schematics/computers/pet/2001N/index.html

I've done two more measurement sessions when the CPU hangs after power up. Unfortunately they're not all the same. Further to above (Measurement 1), I get:

Measurement 2: All Address pins HI, ie AB0-AB15
All Data pins HI except DA1 = LO

Measurement 3: Address pins as in Measurement 1 (ie 0x0AAFF)
All Data pins LO except DA0 = HI. Strangely also on these LOs is a small square waveform about 0.2V hi (taking total amplitude to 1.0V) with a period of about 5ms. I could provide further info, photo of this if necessary.

Philip
 
According to my knowledge of the NMOS version of the 6502 processor there is only one input signal that would actually cause the processor to halt like that and it is the RDY signal. But you say that you have checked it so it should be fine. Possibly could also the reset signal make the chip behave like that if it was asserted in an operation but I seriously doubt it.

Now i don't know for sure if there are any illegal instructions that would cause the processor to freeze like this but i don't think so. But if it were so the processor could freeze due to execution of an illegal opcode, which is due to that memory logic fails.

Is there a clock on the phi2 output (Pin 39 of the CPU) ? If not, it could be due to a faulty A10 device or a faulty microprocessor. If there is a clock on the CPU also check that it is available on A10-8.

Do the address and data buffers outside the processor work properly ? You should see the same levels on both sides of a buffer when the processor is halted.

Do you have access to a logic analyser ? With this you could see what the processor does when it dies/halts/freezes.

Just some initial thoughts I had.
/PacMan
 
memory map

memory map

PacMan said...processor to halt like that and it is the RDY signal.
Click to expand...
You can use RDY & SYNC to single-step, but they only go to a memory expansion bus that doesn't have anything hooked to it.

I dug up a memory map, and it looks like there's free space for a 4k EPROM expansion there. You don't have an extra EPROM in there, by any chance ?

How far are you from getting the other 2114 in there ?

On all your 'stuck' measurements, does the R/W pin stay high ?

What happens if you try manually taking the reset line high ? (To reset with out actually powering down )

patscc
 
2114 replaced

2114 replaced

Ok guys, I've replaced the 2114 that had D0 stuck HI. Video looks different, (more random) but alas no Ready prompt. (However I don't think we were expecting that to fix the whole machine.)

Something that puzzles me: SD4 now has a similar signal to SD5-7 - that's good. But strangely SD4-7 is at twice the frequency to SD0-SD3. I didn't notice that with the old 2114. This new 2114 is a 2114N-3L, so it maybe faster than its neighbour (a plain 2114), but they're strobed the same time, so why the difference?

Other stuff...
@PacMan
Is there a clock on the phi2 output (Pin 39 of the CPU) ? If not, it could be due to a faulty A10 device or a faulty microprocessor. If there is a clock on the CPU also check that it is available on A10-8.
Click to expand...

Yes, clock on phi 2 and A10-8

Do the address and data buffers outside the processor work properly ? You should see the same levels on both sides of a buffer when the processor is halted.
Click to expand...

I checked both sides of buffers C3 & C4. Same levels (HI) when halted.

Do you have access to a logic analyser ? With this you could see what the processor does when it dies/halts/freezes.
Click to expand...

No logic analyser, only a 15mHz scope & logic probe.


@patscc

I dug up a memory map, and it looks like there's free space for a 4k EPROM expansion there. You don't have an extra EPROM in there, by any chance ?
Click to expand...

Not sure what are the standard EPROMS are in this thing yet (I'm a newbie to PETs), but UD3 & UD4 are empty, rest are full.

On all your 'stuck' measurements, does the R/W pin stay high ?

What happens if you try manually taking the reset line high ? (To reset with out actually powering down )
Click to expand...

Yes, R/W stays HI.
Ok to take Reset active (take LO), can I just link it to earth, say 6502 Pin 1? What signals do you want measured when Reseting?

Additionally I've taken the opportunity to replace the 6502 CPU (as it was socketed, easy to do) - no change.

I guess we should be considering that the ROMs maybe faulty. Research on common PET ailments lists the 2114, 4116 & ROMs being common causes. Perhaps when Carlsson's replacement board arrives, (Tezza willing) we maybe able to swap ROMs either onto or out of this board? That would verify that part of the puzzle.

Thanks for the brainpower you guys are shedding on this.
Philip
 
Reset & Scope

Reset & Scope

pavery said...Reset active (take LO),
Click to expand...
That's fine. LO inhibits, the reset is triggered by the next positive edge after 2 clock cycles. So hold, let go, and see what happens.

Is your scope a two-channel, by the way ?
Also, do you have your channel input on the scope switched as AC or DC ?
patscc
 
ROM's

ROM's

I'd wait on the ROMS. I think they're the mask kind, which are harder to kill than EPROM.
Is all this measuring going on with SD4 still disconnected, by the way ?
patscc
 
Wait on ROMs

Wait on ROMs

Yeah, wait on ROMS. Sounds good to me - we could all do with a rest from this thang.

Is all this measuring going on with SD4 still disconnected, by the way ?
Click to expand...

Yes, until the 2114 was replaced. Latest measurement is:

HI on AB0-AB15.
DA0=LO
DA1=LO
DA2=HI
DA3=LO
DA4=LO
DA5=HI
DA6=HI
DA7=HI

R/W=HI

Lastly, the only technical information I've found for 2001 type PETs is the schematic. Was there never any Theory of Operation or such published for it?

Thanks
Philip
 
For Patscc: From Post #88

Ok guys, I've replaced the 2114 that had D0 stuck HI. Video looks different, (more random) but alas no Ready prompt. (However I don't think we were expecting that to fix the whole machine.)

Something that puzzles me: SD4 now has a similar signal to SD5-7 - that's good. But strangely SD4-7 is at twice the frequency to SD0-SD3. I didn't notice that with the old 2114. This new 2114 is a 2114N-3L, so it maybe faster than its neighbour (a plain 2114), but they're strobed the same time, so why the difference?
Click to expand...

Philip
 
I found this page with some information on illegal opcodes for the 6502. http://bbc.nvg.org/doc/6502OpList.txt
It seems there actually is a 6502 opcode that will halt the processor and keep in that state until reset is asserted. If your Pet board is executing this opcode it could very well behave like what you are describing.

Are the ROM's socketed ? If so can you dump the them ?, maybe someone here can compare them with theirs to see if they are valid. If they are valid I would check the select logic for the ROM's (D2) to see that it is working properly.

I am not entirely convinced that it is the video logic that is causing the processor to halt like this, but i am often wrong so don't hold me to it ;-)

/PacMan
 
trigger

trigger

pavery said...But strangely SD4-7 is at twice the frequency to SD0-SD3
Click to expand...
Possibly the binary representation of the character set. Let me ask you a question. What are you triggering off of when looking at the waveforms ?

You've tried all the obvious stuff, like reseating the ROMS & character ROM, right ?

At this point I'd go get a cup of coffee or a lager, and start checking the SEL lines going to the sytem ROMS (pin 20 on the ROMS) (Don't know if you've done this yet).
Pick a line, reset, observe, next line, etc.

Too bad you guys don't live closer.

I'd also solder a wire to something, or a switch, or something like that so you can do a reset without turning it on/off, if you haven't done this already, so that you don't fry your CRT.

patscc
 
patscc said:
You've tried all the obvious stuff, like reseating the ROMS & character ROM, right ?
Click to expand...

Yep, I tried this when I first got the machine. Reseated and also cleaned them up.

They were well rusted in and during this process I snapped the bottom of a leg off one of the pins. I soldered a replacement on though and I think it's quite firm. It would pay to check it is conducting from the bottom of the motherboard through to the top of the IC though Philip. I think you can see which leg it is.

Anders's board should be here soon. We can then swap out the ROMs and see if there is any difference.

Tez
 
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