486DLC Cache

[FishFinger]

Does anyone have the software for enabling the internal cache on these chips?

 

[Raven]

What brand, IBM I presume?

 

[Jorg]

http://www.drivermuseum.com/files/utils/system_u.html

Ouch seems to be down

But it seems to be here:
http://www.eunet.bg/simtel.net/msdos/sysutl-pre.html

ftp://ftp.eunet.bg/pub/simtelnet/msdos/sysutl/cyrix100.zip

 

[Raven]

I (strangely) can't find a 386 pinout, but if you can it's possible that there's a cache enable pin like on the 486 and you could build an interposer.

 

[FishFinger]

http://www.drivermuseum.com/files/utils/system_u.html

Ouch seems to be down

But it seems to be here:
http://www.eunet.bg/simtel.net/msdos/sysutl-pre.html

ftp://ftp.eunet.bg/pub/simtelnet/msdos/sysutl/cyrix100.zip

Thanks.

I (strangely) can't find a 386 pinout, but if you can it's possible that there's a cache enable pin like on the 486 and you could build an interposer.

There's no cache pin on the 386 since none of them had internal cache. On the boards with external cache it was managed by the chipset, the CPU didn't see it as being any different from the rest of the RAM.

 

[IBMMuseum]

What brand, IBM I presume?

Specifically on the IBM CPUs (386SLC, 486SLC2, 486SLC3, and 486DLC2) it can be turned off or on by writing a "Model-Specific Register" (1000h if I remember correctly). For the PS/2s using those CPUs, there was even a BIOS call: http://ibmmuseum.com/Interrupts/INT15h/INT15hC8.html. Granted that the OP doesn't seem to be looking for this particular information.

 

[Anonymous Coward]

The Cyrix 486DLC chips don't have a cache enable pin. That is done through a CPU register, and you need the software or a computer with BIOS support to enable/disable it. It is disabled by default.