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16 bit ISA ram card design...

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prime

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Hi all,

I'd like to try and design a 16bit ISA RAM card to allow me to fill in the unused space in the $A0000-$FFFFF area of the memory map of my 5170 AT.

Obviously if I used standard SRAM chips these are 8 bits wide so I'd need 2 in parallel to give me a 16bit wide data bus, I would also need to decode these to respond at the addresses I wanted the memory to appear at, I can do this with a CPLD for flexability.

16 bit accesses would be no problem as both chips would get selected and the data read or written to the entire D0-D15.

What I am unsure of is how to handle 8 bit accesses, as these would access either one or the other chip. I guess this would need to be done without activating the other chip to prevent it gatting un-intentially corrupted with whatever else is on the bus.

Does someone know how I should go about this ?

Cheers.

Phill.
 
There's an interplay between SBHE and A0. It's pretty straightforward. SBHE (assuming that your card has asserted MEMCS16) indicates that the high-order (bits 8-15) part of the bus is being used. SA0 indicates which half. So if SBHE is active and SA0 = 0, then you transfer all 16 bits. If SBHE is active and SA0=1, then you transfer just the upper 8 bits. The only other combination that's encountered on a true 16 bit system is SBHE inactive and SA0=0, then you transfer only the lower 8 bits. If you're running on a PC AT, the last combination, SBHE inactive and SA0=1 never occurs. However, if you want to build a card that can work in an 8 bit slot, you can transfer the upper 8 bits of a word to the lower 8 bits of the bus if that combination does occur. Most 16-bit memory cards don't do this, however.
 
Lookup the B8 line for this, to operate with zero wait states.

There is much of the Mindshare book "ISA System Architecture, 3rd edition" available on-line (officially) and the whole thing can be purchased in PDF format very cheaply. I'm not associated with Mindshare or author, just mention it because I found it very useful for minimal outlay.
 
You also need to signal the /MEM16 and /IO16 based on your card select if you want the processor to consider the transfer 16-bit complete - otherwise it will assume it's talking to an 8-bit device, only consider the low byte valid and reissue the transfer with SBHE=0/A0=1 to get the upper byte.
 
Didn't I say that?
Chuck(G) said:
(...assuming that your card has asserted MEMCS16)
Click to expand...

One important aspect is that you can't assume that since you've asserted MEMCS16 or IOCS16 that it's been seen. For example, if you put your card in an 8-bit slot, you'll be shining the MEMCS16 or IOCS16 signal lamp into the void. So if you're intending that the card also be usable in an 8-bit slot, you need to know that just because you say the card is 16 bit that anyone will notice.
 
Chuck(G) said:
There's an interplay between SBHE and A0. It's pretty straightforward. SBHE (assuming that your card has asserted MEMCS16) indicates that the high-order (bits 8-15) part of the bus is being used. SA0 indicates which half. So if SBHE is active and SA0 = 0, then you transfer all 16 bits. If SBHE is active and SA0=1, then you transfer just the upper 8 bits. The only other combination that's encountered on a true 16 bit system is SBHE inactive and SA0=0, then you transfer only the lower 8 bits. If you're running on a PC AT, the last combination, SBHE inactive and SA0=1 never occurs. However, if you want to build a card that can work in an 8 bit slot, you can transfer the upper 8 bits of a word to the lower 8 bits of the bus if that combination does occur. Most 16-bit memory cards don't do this, however.
Click to expand...

So in a purely 16 bit card, then assuming that :
I assert /MEMCS16,
I have 2x 8 bit wide chips connected to each half of the data bus
The ram chips have an active low chip select

I can use A0 as a chip select for the lower chip, and SBHE as chip enable for the upper chip, I'd obviously need to combine this with my address decoding so that the memory appears in the correct bank, but that should be easy enough, as I plan to use a small CPLD to do this.

Cheers.

Phill.
 
Success !

Nortons SI4 now reports 160K of extra ram at seg C800 (so C800:0 to E000:FFFF).

Seems that MEMCS16 has to be asserted as soon as possible, so I had to assert it as soon as I detected an address in either the C000-D000 block or the E000-F000 block and then assert it if the address on the rest of the bus indicated that my RAM was not being addressed. This seems to work, I had to do this as the ROM on my video card (SVGA) at C000 is only 8 bit, so having MEMCS16 active was meaning it wasn't initializing the video, as I guess the ROM was not being correctly read.

I'll post some pictures later, and once it's done probably the schematics / CPLD code if anyone is interested.

Next up to break out the UMB drivers that I'm using on the XT and see if I can actually use the memory :)

Cheers.

Phill.
 
Congratulations!

Yes, MEMCS16 is generally tied right to the output of the address-select hardware. You need only look at the 5170 techref to see how this works with bog-standard IBM memory expansion cards.
 
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