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Improved RL01/RL02 disc simulator available

Hi All;
Thank You, Reinhard, that is what I was hoping.. I will Look into it further, as this would be a better Route for Me than Trying to get some OLD SMD Drives going on my Spectra Logic Boards, of unknow workability..
Termination I can Handle..
Thank You Reinhard for making and or giving Me the possibility of Having something that I can Use on my PDP 11/45, for Disk Storage..
THANK YOU Marty
 
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Hi All;
Thank You, Pbirkel, But still the Question is ""What is a TS11 U Serial tape control module ??
And What is it used for ?? And is it anything I can use ??
THANK YOU Marty
 
Hi All;
Thank You, Pbirkel, for clarifying that, Even though I would say its Bigger than 9", I would call it a 9 Track Tape Drive..
I have a Cipher 990 Auto Load, which Maybe sometime I can hook up to my Spectra Logic 21 Board, and see if the Spectra Board works.. I know the Drive Does, so it would Only be the Spectra Logic Board that could be causing a problem, if one existed..
THANK YOU Marty
 
Hi All;
Thank You, Pbirkel, for clarifying that, Even though I would say its Bigger than 9", I would call it a 9 Track Tape Drive..
I have a Cipher 990 Auto Load, which Maybe sometime I can hook up to my Spectra Logic 21 Board, and see if the Spectra Board works.. I know the Drive Does, so it would Only be the Spectra Logic Board that could be causing a problem, if one existed..
THANK YOU Marty
Typo on my part, of course. Was hurried :-<.
 
Reinhard,

Yes, I could have added the delay in Verilog, but it was quite simple for me to do it in hardware. I made a little adapter to fit in the socket where the 75107 carrying the system clock goes. I was able to pull it out and put it back to cause and then fix the problem for the photos below. I'll write more about now.

Here is an example of the problem I was having. Here is an image of the debug console before I added the delay. http://www.vintage-computer.com/vcforum/album.php?albumid=184&attachmentid=17244 Running on the 8/a is the AJRLLA pack verifier diagnostic. The received commands at the emulator should always be first, move heads one track away from the spindle and select head zero, followed by select head 1, then repeat. In the case above, the head moves to track three OK, then changes heads, but the command to go on to track four (0000000010000101) is not received properly (0000000000100001). It looks like the synch marker bit was not observed and that the head move direction bit was picked up as the synch marker bit. The received command is interperted to go back to same track, head zero. A retry is made with the same result, and the diagnostic halts http://www.vintage-computer.com/vcforum/album.php?albumid=184&attachmentid=17245. Sometimes the retry would be successful, but not this time. Proper operation will look like this to the end of the last track: http://www.vintage-computer.com/vcforum/album.php?albumid=184&attachmentid=17241 with the diagnostic announcing success on the console terminal: http://www.vintage-computer.com/vcforum/album.php?albumid=184&attachmentid=17242 .

Here is the timing before the delay was added: http://www.vintage-computer.com/vcforum/album.php?albumid=184&attachmentid=17246 and the after: http://www.vintage-computer.com/vcforum/album.php?albumid=184&attachmentid=17243 . You can see that simply the system clock was delayed by 20ns, but that seems to make an big difference in the performance.

So, somehow I think the sync marker bit was getting missed.

Lou

PS. I will find a way to send the OS/8 .DEC pack image once I fill it with useful diagnostics / PAL / basic / fortran / adventure so that anyone else that uses it will have a nice collection of software ready to go.
 
Lou,
I can not confirm your analysis concerning sync marker bit and delayed system clock.
Concerning your timing: Where did you accurately measured? Are you using level-Converter chips?
IF you are using level-Converter chips, this could happen:

................. /
................./----------- TTL trigger Level (3.3 Volt)
............... /
.............. /
............../
............ /--------------- FPGA trigger Level (1.2 Volt)
............/
------------
........--->|---|<---------- !! Level-Converter "DELAY"


If you want to delay the systemclock, here is the part from my Verilog program :
my_command_sequencer_V1_0.v, change rclksync_4_1[2:0] to rclksync_4_1[3:0].
always @ (posedge clk_65_6)
begin
rclksync_4_1 <= { rclksync_4_1[2:0] , clk_4_1 };
end
assign synced_clk_4_1 = rclksync_4_1;

My two prototype boards work without level-converter chips and do not have the effect which
you have reported. How do we get more? Redesign of the interface board with level converter
chips instead of resistors? It is important if we want to build a PCB.
 
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Hi All;
Reinhard, I am wondering what is the size of Your FPGA and or what chip does Your Board use ??
The reason I am wondering Is that I will be using a different Board, (It is what I have or have access to) and I will be using the Help of a Friend of Mine who does FPGA work for a living, to Port it over to my Board.. I have helped Him on many of His Boards.. I will be doing most of the Work, like pin exchange from one style Board to another style board..
THANK YOU Marty
 
Hi All;
Thank You Reinhard, I will need to find out what a ""CYCLON iV "" is, Since what I have available and the Tools for is Xilinx type of Boards, such as the Spartan 3, and such.. I will let You know as things progress..
I had already Downloaded Everything from Your HomePage.. Since I am not familiar with Altera nor their DE0-Nano Board, that is why I asked..
Thank You for Your Time and all the Work that You are doing.. Only now is my friend able to have enough free Time that He would be able to Help, Before He was too Busy with Work related things..
I have found that I have 5 ea 75107's and No 75113's.. I have some 75123's, I need to find out what the difference is between these two Ic's, they may be nowhere the same.. I'LL have to look.. Most of what I have are Mos Memory Drivers and Core sense Amps..
THANK YOU Marty
 
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Hi All;
Reinhard, I know that it is a low cost board, But at the present I can't afford it at all..
I have access to everything that I would need including numerous types of Xilinx type of boards and all the software to port and to emulate these boards..
I figure I can try or at least have my Friend look at what You have and what you are doing.. And tell me its possible or it is Not possible..
He has also worked with Arm -7 and Arm -9, and Has tools for that implementation as well..
Actually the One thing that I don't have and don't know If my friend has either is the SD Memory Board..
And actually the way we would go is with am SPI Memory chip.. He has this all worked out for His Designs and has some that I could use..

Also it would be good for everyone to know, in case they cannot get them at other places.. Where did you get your 75107's and 75113's ??
THANK YOU Marty
 
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Reinhard,

I had the logic analyzer connected at the output of the 75107s. All signals went through the level converter, so all would get delayed. I had the threshold set at 2.5V. I had been wondering what the threshold was for the FPGA... it seems really low.

Although you and Jonny haven't had problems with the voltage divider level converter, the 74LVC245 seems pretty bullet proof. It cost $2USD and only one is needed to replace 14 resistors (and probably draws less current and has less stray capacitance, so corners of pulses stay nice and sharp.) I liked it so much I bought some extras. Have you designed the PCB yet?

I did not mention it earlier, but as you stated, V3.04 is much, much faster than V3.03. I tried both with the 8/a pack verifier and V3.04 is at least 50% faster. Over the weekend I made the modifications to the Quartus II logic of V3.04 to support my front panel (adding the pins in the pin planner and creating copies of the LED drive outputs, as well as connecting my front panel drive select switch and reset button.) I initially thought I would stay with 3.03, but the speed improvement was too attractive!

Marty - I bought all the store-bought parts from Newark (Element/14), even the DE0-Nano. I would usually like to buy from Jameco when possible, but since I had to order the DE0-Nano from Newark, I bought everything from them. They had the TI 75107 and 75113s. The 74LVC245s I bought from Adafruit (local to me) because I was also getting some other stuff from them. Actually I see they are $0.50USD from Newark.

Lou
 
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Lou,
The main reason why I have implemented this version V3.04 was speed improvement.
I can still increase the speed because The CYCLON IV FPGA can hold much more
data than only one track. The head-switch time would fall away and up to 2 cylinder
of data can be hold in the on-board-FPGA memory. On the other site, the RL controller
may run in overrun problems ?
Concerning the 74LVC245. This chip is converting the signals comming from the controller
like the system clock. ?? In my schematics I use a 74LS245 already for the signals going
to the controller.Can you provide a (handmade) schemtics from your interface ? ..just to
be compatible and of course I also don't like to use the resistors.
Regards, Reinhard
 
Bootable OS/8 RL02 pack image available

Bootable OS/8 RL02 pack image available

Folks,

I have made a bootable OS/8 RL02 pack image that I'll e-mail to anyone interested. You'll need an RL8A and to have built your own of Reinhard's emulator. Tonight I put it through the acid test, booting OS/8 and running OS/8 colossal cave adventure. It's extremely disk intensive. It runs just fine. I played long enough to get the gold nugget and then successfully saved the game to disk. (Watching the AC is boring on an 8/a. On the 8/e you see the chasing snake pattern on the lghts - it just ain't then same on the 8/a.)

http://www.vintage-computer.com/vcforum/album.php?albumid=184&attachmentid=17481
http://www.vintage-computer.com/vcforum/album.php?albumid=184&attachmentid=17482

The pack image has most of OS/8, handlers, basic and games, kermit, fortran and the FRTS, the RL and RX and some other maindecs, and most importantly Adventure! Send a PM with proper e-mail address if you want a copy. Of course I have sent a copy to Reinhard already.

If you have an RL8A, you should really build this emulator!

Lou
 
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Can your image be mounted under SIMH or E11? If so, I'm not sure why the RL hardware emulator should be necessary. I could use the software emulator to copy the image to a ZIP disk on my PC, then load the disk with image as a data drive on my 11. I can't remember all the details right now, but shouldn't I be able to do a binary disk copy (either some RT11 equivalent to dd or else run BSD and do a real dd) of the image onto an RL02 pack on my 11/73 and then transfer the pack to my 8/A and run it?

Thanks,
Jack
 
If you have an RL8A, you should really build this emulator!

Lou,

Is the hex-wide RL8A the only hard disk interface for pdp-8's??? I was looking at the Doug Jones OMNIBUS list and that was it... If so, pity it won't fit in an 8/e (without extraordinary measures like bus interfaces)
 
Jack,

I didn't try to run it under a processor simulator, but I did try PUTR. I used my utility for stripping the RL02 headers off the disk image to make it a raw sector by sector image that PUTR usually uses. That utility works perfectly for RT-11 formatted pack images, making them work under PUTR just fine. Then I run my utility to put all the sector headers back and with RT-11, it works fine on the disk emulator.

However, this did not work for this OS/8 pack image under PUTR. I am afraid that PUTR may not know how to deal with the four RL02 OS/8 partitons. I know that PUTR deals with RK05 partitions fine though.... Has anyone ever really had an OS/8 RL pack image to work with under PUTR?

I never got RT-11's binary disk copy to copy pdp-8 OS/8 packs. Has anyone ever made that work?

What might be easiest would be if David's dumprest utility would work with RL drives.

Lots of food for thought here.


Crawford,

RL8A works fine in the 8/e if you put it in a card extender and hang it out the top. I have a photo of that.

There are other practical options for hard disks, of course RK8E.

Lou
 
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