Recently I got my amateur radio license... one result of that is that I want to at least partially build my own radio- either SDR or a small home computer to handle digital operating modes. Sure, a DSP or FPGA dev board would be more than up to the task, but I feel like I want to create something custom to sharpen my skills and try different things as well.
My computer architecture knowledge hasn't been at its peak since... well, since I had to build a toy CPU in Verilog for a class
. It could add, subtract, jump unconditionally, jump on condition, move, load, store, and not much else. Making a new system from components would bring my knowledge of how the timing of the control/address/data buses interact with each component back up to speed. In particular, I've been interested in how I would implement a system with DMA and multiple address spaces- something I was never taught to do in my class simply due to lack of time.
I do not have ANY real design laid out. My processor of choice would be the 65816 in Native Mode- it has a simple assembly language and a number of features that I feel are underused, and I just have fun writing code in it. Other constraints would include the following:
So this is more of an education exercise than anything to see if I can get this right.
Whether this idea gets off the ground remains to be seen- and it won't be any time within the next few months. However, I figure I should mention it now so I can get some feedback and as a reminder to myself. I'll draw a simplified circuit soon.
My computer architecture knowledge hasn't been at its peak since... well, since I had to build a toy CPU in Verilog for a class
. It could add, subtract, jump unconditionally, jump on condition, move, load, store, and not much else. Making a new system from components would bring my knowledge of how the timing of the control/address/data buses interact with each component back up to speed. In particular, I've been interested in how I would implement a system with DMA and multiple address spaces- something I was never taught to do in my class simply due to lack of time.I do not have ANY real design laid out. My processor of choice would be the 65816 in Native Mode- it has a simple assembly language and a number of features that I feel are underused, and I just have fun writing code in it. Other constraints would include the following:
- Support cycle-steal DMA implementation using either a dedicated DMA controller or coprocessor (65C02) to maximize bus bandwidth. If the latter, 32kB would be a window into the 65816 address space, the upper 32k would be relevant code/data. Kinda like the Z80 access to the 68k on the Genesis actually... except unlike the Z80, this 65C02 can't take control of the 65816's bus except during DMA.
- Do not use FPGA/CPLDs
- Use only parts which are still produced as of 2014
- Does not need to be limited to ham radio applications
So this is more of an education exercise than anything to see if I can get this right.
Whether this idea gets off the ground remains to be seen- and it won't be any time within the next few months. However, I figure I should mention it now so I can get some feedback and as a reminder to myself. I'll draw a simplified circuit soon.