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Morrow HDC/DMA Winchester controller

Frank S

Experienced Member
Mar 31, 2013
Is there any user out there, who has an working(in use) Morrow HDC/DMA controller.
Also looking for an service manual for the HDC/DMA, not the "normal" technical reference manual.


Al Kossow

Documentation Wizard
Sep 1, 2006
Silicon Valley
Also looking for an service manual for the HDC/DMA

It doesn't exist.
If you look under Morrow on bitsavers, you'll see bits and pieces of internal documents from the contractor that
did the HDC controller designs for George.

Frank S

Experienced Member
Mar 31, 2013
Thanks for the link Al.
I know all the document from bitsaver about the HDC/DMA.
No one describe the adjustment of the VCO. There are two variable resistors and two test points.
I found a position of the 500Ohm pot where the read errors are least, but i do not know what i do.
Also i have changed some TTLs, but there are allways intermittend read errors.


Frank S

Experienced Member
Mar 31, 2013
I found a instruction for adjusting the PLL loop in the web.
But my adjustments where 99% good as in the instruction.
There are allready intermittend errors when reading a known good hard drive.

HDC/DMA Adjustments

During the useful product life of the HDC/DMA disk controller it
may be necessary to adjust the phase-locked loop circuit. There
are two potentiometers on the PC board which set the center
frequency of the PLL and the charge pump current of the loop.
The pots are used to allow for variations in the discrete
components as well as variations in the performance of the
varicap (MV1404) and have been adjusted and sealed at the factory
for correct operation. This procedure should be followed if the
PLL is being either checked or re-adjusted and assumes the tec
hnician has both experience with and access to an oscilloscope
with a 100 Mhz bandwidth (Tektronix 465 or equiv.).

Since the data transfer rate of the 5 inch winchesters (ST-506
type) is different from the transfer rates of 8 inch drives (SA-
1000 type), there are two different center frequencies for the
phase-locked loop. Wherever their is a difference in the
frequency adjustment procedures, the SA-1000 adjustments will be
given in parenthesis. The transfer rate for the ST-506 is 5.0
Mbit/s. The transfer rate for the SA-1000 is 4.34 Mbit/s.


Channel 1: 1.0 Volt / Division
Channel 2: 0.2 Volt / Division
Sweep Mode: Alternate
Coupling: DC (Both channels)
Trigger: Auto / Channel 1 / Negative edge
Timebase: 20 ns / Division (or smallest division
possible for your scope)
Sweep Dly: Normal

1. Install HDC/DMA into system and apply power. A disk drive
need not be connected to controller yet.

2. Using an insulated clip lead (as short as possible), ground
TP2 located at 1D (near the top right corner of the bottom
voltage regulator heat sink).

3. Place scope probe for channel 1 on pin 11 of IC at location
4C. Place scobe probe for channel 2 on test point 1 (TP 1)
located just under IC 1B (74LS00).

4. Set the frequency adjust pot (board location 1D) to its maxi
mum clockwise rotation.

5. Adjust the charge pump balance pot (located at 1C) so that
the base line of the voltage appearing on scope channel 2 is
centered about the 0 volt line (i.e. no DC offset present).

6. Adjust the frequency control pot at location 1D for a 10 Mhz
waveform (8.68 Mhz for SA-1000) on scope channel 1. With the
scope setting above, the period should be 5 divisions (6.3
divisions for the SA-1000). Keep adjusting pot to obtain the
minimum amount of ripple on the channel 2 waveform. The two
waveforms should now appear to be in "lock" with each other.

7. Remove the jumper to ground from TP 2. The signals should
remain synchronized to each other.

8. Attach a formatted disk drive to the controller using the 34
pin control (50 pin for SA-1000) and 20 pin data cables.

9. Using the CP/M disk utility DU.COM or a similar program, log
onto or access the hard disk drive. The waveforms on the
scope should remain in lock shifting slightly everytime the
controller is issued a read command so as to syncronize with
the disk data. When not reading the disk data, the PLL will
again become synchronized to the onboard 10 Mhz (8.68 for SA-
1000) crystal.

10. It is now necessary to power the computer off and then on
again to be sure the loop will synchronize correctly each
time power is applied. When the board is first powered up,
it is likely the loop has synchronized to a harmonic of the
onboard crystal. However, after the first time the disk has
been accessed (read command has been issued), the controller
should lock to the 10 Mhz (8.68 for SA-1000) crystal and the
disk data. Repeat the power off/on and read sequence several
times to be sure this is consistant. If the loop does not
lock each time, adjust pot at location 1C (adjusted in step
5) so the waveform for channel 2 has a slightly more positive
DC level than before (rotate clockwise). Repeat this step
until loop behavior is consistant.

11. Using glyptol or similar sealant, seal pots to prevent
accidental mis-adjustments of these pots.