cbscpe
Experienced Member
In various threads the question regarding block mode DMA for Q-Bus has been discussed and there is a fairly good explanation in the Q-Bus documents and I still have the open task to implement block mode DMA on my own Q-Bus Memory Module. Therefore I would like to have an engineering drawing or schematic of such a block mode capable memory as a reference. Ideally a schematic of own of the DEC memories that are DMA capable like the M7506, M7558, M8067, M7551 would be very useful. But also the drawing of a third party memory with block mode DMA support would helpful. Does anybody have such a document?
The issue is that I do not have any block mode capable memory that I could reverse engineer or at least use a LA to see how it works. At least I have two disk-controllers (a RQDX3 and a UC07) that are block mode DMA capable, so at least I could then verify this with my own memory, once I have implemented Block Mode DMA.
Peter
The issue is that I do not have any block mode capable memory that I could reverse engineer or at least use a LA to see how it works. At least I have two disk-controllers (a RQDX3 and a UC07) that are block mode DMA capable, so at least I could then verify this with my own memory, once I have implemented Block Mode DMA.
Peter