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What is actually known about the PDP-11/74?

cbscpe

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How much is known about the PDP-11/74 and what is actually available. E.g. pictures, documentation, programmers that have worked with it? As far as I know this machine has never been made available to the public. However there is still so much said and there are many notes even in DEC documents that mention a PDP-11/74? I'm asking because in, I think it was in 1987, when I was reading the source code of RSX-11Mplus I saw many references to a multi processor machine and there was even a Mutex using the ASRB instruction that waited for the low bit to be set (and hence automatically cleared it when it was set). And strange enough the ASRB is also one of the few instructions of the DCJ11 that does not allow for short memory cycles (aka Cache Hits) and always uses a stretched cycle and using the bus cycle code for read-write-modify with bus interlock. So perhaps there is a chance to build one using 2 or more DCJ-11 :rolleyes:.

Peter
 
I worked on the 11/74 project back in the day when I was still at DEC. Writing microcode (one of three people) for the 11/74 CIS Commercial Instruction Set option.

There were actually two ongoing enhancement projects for the 11/70 going on at the time:

(1) the 11/70mP project, which used basically OTS 11/70 boards, with the small tweak to the ASRB microcode for an atomic operation. Also implemented
was something called the IIST module, which stood for IIRC Interprocessor Interrupt and Sanity Timer. It allowed for CPUs interrupting other CPUs for messaging.

(2) the 11/74 project, which was the addition of a high performance implementation of the PDP-11 Commercial Instruction Set, supporting character string
moves, decimal arithmetic and the like. Supported thru the PDP-11 COBOL compiler at the time. IIRC there were three hex logic boards added to the 11/7x backplane
for the CIS hardware. Some RH11 slots were removed to make the backplane the same physical size as the older 11/70 backplane. Technology was basically the same,
a mix of some etch but mostly wirewrap. A few CPU cards were updated with new logic to provide access into the CIS hardware.

After finishing the design and doing an engineering release on the 11/74, DEC product marketing decided not to pursue selling the 11/74 CIS variation.
Ostensibly the reason was it cost too much to make, it did not cost reduce the 11/70 (but IMHO that was not an original goal). My view was that we did
too good a job in implementing a high performance commercial instruction set. Much better than the 11/780 could do at the time. And that was the reason
for the death of the 11/74. DEC was pushing customers to VAX at the time (this late 70s early 80s) and did not want them to stick with 11/70s. Others cite
other reasons but I know what we talked about over coffee and why the 11/74 got the axe.

I think there are several 11/74 project related documents on bitsavers now (1174sysEvalPlan_Jun79.pdf, Prelim_KB11-E_Diffs_Aug78.pdf).

Ultimately DEC took the 11/74 moniker and reused it for marketing the 11/70mP product, which was just a bog standard 11/70 with the updated ASRB microcode
and the IIST option.

Here is a scan of the plex front panel I saved from an actual 11/74 that has the CIS option. Note the extra selections for the DATA switch:
1174_front_panel_scan.jpg
 
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DEC was pushing customers to VAX at the time (this late 70s early 80s) and did not want them to stick with 11/70s.

The running joke about DEC reps at the time was:

Hello, I'm from DEC. The answer is the VAX. Now, what's the question...
 
The 11/74 LA line references KB11-CM which I think is the MP version of the original KB11-C classic 11/70 CPU. The 11/74 w/CIS was properly known as the KB11-E variant.

My opinion ...
11/74 Lx/Rx/Ux labeled lines here are single CPU 11/70-MP version of the 11/70, not anything 11/74 w/ CIS related. Left/Right/Uniprocessor cabinet options as Lx/Rx/Ux?
11/74 Dx appear to be a pair of 11/74 CPUs, one each of Left/Right Lx/Rx.
11/77 XX lines appear to be a pair of plain old 11/70 CPUs.
 
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Thanks a lot for the insight information and the link to the documents. Very interesting story. I was not aware that CIS was one of the key features. Honestly, although I worked quite a lot with PDP-11s I've only read about but never seen a PDP-11 with the CIS option installed. As all systems I worked with were used in data acquisition and system control environments it's obvious that this was not required. A faster floating point however was always on top of our wish list. But this never happened and at the end the SCADA system was ported first to VAX and later to i86 based servers.
 
With respect to the original 11/74 project, CIS was the ONLY reason to do it. Otherwise it was just a standard 11/70.
Once the 11/74 became the new name for the 11/70mP, the only change was to the IR decode logic and microcode support for the ASRB instruction implementation as a semaphore.

I have the CIS option in my 11/44 system. It was being developed in parallel with the 11/74 CIS project. The 11/44 CIS has much lower performance, the goal was to get all the instructions implemented and performance was secondary. The 11/44 CIS is a two board set, a hex datapath M7092 that goes in slot 2 of the 11/44 backplane, and a quad control store module that goes in slot 1 of the 11/44 backplane.

I believe there is microcode, or a microcode option chip, to add CIS instruction support to the J11 processor. The 1982 J11 Programmers Reference Appendix 3 lists the CIS instructions supported by the J11. However, I have to knowledge of the J11 CIS beyond this. It was after I left DEC and I have no J11 systems.
 
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I've only read about but never seen a PDP-11 with the CIS option installed
I have seen and I have :)
Code:
RT-11SB  V05.07

.R MSCPCK

.SHO CONF

RT-11SB  V05.07
Booted from DU2:RT11SB

USR     is set SWAP
EXIT    is set SWAP
KMON    is set NOIND
MODE    is set NOSJ
TT      is set NOQUIET
ERROR   is set ERROR
SL      is set OFF
EDIT    is set KED
FORTRAN is set FORTRA
KMON nesting depth is 3

CLI is set DCL, CCL, UCL, NO UCF

PDP 11/23 PLUS Processor
256KB of memory
FP11 Hardware Floating Point Unit
Extended Instruction Set (EIS)
Commercial Instruction Set (CIS)
Memory Management Unit
Parity Memory
60 Hertz System Clock

FPU support

.TYP TEST.MAC
        .TITLE  TEST
        .MCALL  .EXIT, .PRINT

.MACRO  SZ$NUM  LABEL, VAL, ?L1, ?L2

LABEL:
        .WORD   50000+L2-L1-1   ; 50000 - signed zoned numeric
        .WORD   L1+1
L1:
        .ASCII  \VAL\
L2:
        .BYTE   0
        .EVEN

.ENDM   SZ$NUM

.MACRO  SZ$PRINT        LABEL
        MOV     LABEL+2, R0
        DEC     R0
        .PRINT
.ENDM   SZ$PRINT

START:

        ADDNI
                N1DSC, N2DSC, N3DSC

        SZ$PRINT N1DSC
        SZ$PRINT N2DSC
        SZ$PRINT N3DSC

        CVTNPI                  ; numeric to packed
                N4DSC, BUF1


        CVTNPI                  ; numeric to packed
                N5DSC, BUF2

        MULPI                   ; multiply packed
                BUF1, BUF2, BUF3

        CVTPNI                  ; packed to numeric
                BUF3, N6DSC

        SZ$PRINT N4DSC
        SZ$PRINT N5DSC
        SZ$PRINT N6DSC

        .EXIT

SZ$NUM  N1DSC   <+12345>
SZ$NUM  N2DSC   <+23456>
SZ$NUM  N3DSC   <+00000>

SZ$NUM  N4DSC   <+123456789012345>
SZ$NUM  N5DSC   <+234567890123456>
SZ$NUM  N6DSC   <+000000000000000000000000000000>

BUF1:   .WORD   60000+31.
        .WORD   ADDR1
BUF2:   .WORD   60000+31.
        .WORD   ADDR2
BUF3:   .WORD   60000+31.
        .WORD   ADDR3

ADDR1:  .BLKB   32./2
ADDR2:  .BLKB   32./2
ADDR3:  .BLKB   32./2

        .EVEN

        .END    START


.EXE TEST
+12345
+23456
+35801
+123456789012345
+234567890123456
+028958998520042431946358064320

.
 
I've only read about but never seen a PDP-11 with the CIS option installed.
A company I worked for many decades ago ran a Dibol based business system running on CTS-500 (RSTS/E) on an 11/44 with CIS. If compiled correctly Dibol would use the CIS instructions and run faster.
 
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