A New S-100 Bus Master/Slave 80386 CPU Board

[Chuck(G)]

Why not just glue a Raspberry Pi to an S100 prototype board and let it run 386 emulation software? It might even be faster than a genuine 386--and have some cool peripherals. Shades of the "new" Commodore 64...

 

[luckybob]

while we are poking holes in this... why not use pc104 instead of s-100?

 

[NobodyIsHere]

I now thinking perhaps we should settle for a simple static RAM board. The best I’m seeing so far are things like the Cypress 1MX16 (CY62167DV30)’s 48 pin TSOP’s. These are ~0.8” X 0.5”. So Andrew could probably get at least 24 of them on an S-100 “daughter board”. That would give us 48MG. Problem is it would be one hell of an expensive board. But backing off in capacity however one could probably get to 16MB at a reasonable price.

Any suggestion where the “sweet spot” is capacity/price wise for Static RAM chips.

Andrew for your DP8422A, we may as well go Static RAM. It seems to me to be a large chip for little RAM capacity. Am I missing something?.

Hi John! Thanks! I suggest we proceed with a two phase approach; first, build a SRAM board using either the PSRAMs or the high density SRAMs. Second, build a DRAM board using DP8422A chips.

The PSRAMs or high density SRAMs should allow us to get to 32MB and maybe even 64MB or 128MB possibly. That should be sufficient to prove the 80386 CPU to memory mezzanine connector works and give a fighting chance to anyone willing to port a protected mode OS. The memory chips are all SMT but the glue logic should be simple enough to allow for the exception. I'd consider this board a "bridge" or transition to a larger DRAM based solution.

The DP8422A DRAM board should be able to get to 128MB at least. Each DP8422A can access up to 64MB and if using a 72 pin SIMM. The DP8422A directly supports up to 4Mb DRAM chips so we would have to find the right SIMMs with compatible RAS/CAS lines. The nice thing about the 64MB 72 pin SIMMs is they are a more or less fixed standard package of traditional DRAMs. They don't use any of the synchronous state machine logic that were introduced with SDRAM (PC-100 and later 168 pin DIMMs). I am thinking a mezzanine with 4 DP8422A DRAM controllers and 4 64MB SIMMs is within reasonable possibility. It can also be done with 100% PTH parts and 5V compatibility. I think 2 layer PCBs would support this at lower frequencies such as 16MHz or less.

I do not think we should go with the FPGA approach. Frankly, it adds a lot of complexity not to mention a whole suite of voltage compatibility issues with SDRAM and the FPGAs themselves and are sensitive to PCB trace issues (matched impedances and other issues). Almost certainly they would require expensive 4 layer PCBs. They are also 100% SMT technologies which will not be hobbyist friendly.

We have to keep the end customer (the hobbyist) in mind when making the design choices and accept there are inherent limitations by staying in this genre. What is the point of making a memory board that hobbyists can't or won't build themselves? We will be stuck with boards that cannot generate enough demand to warrant even going to "production". Pre-assembly of boards is simply not an option due to cost and hassle. I can barely keep up with the bare bones PCB only approach!

Thanks and have a nice day!

Andrew Lynch

 

[NobodyIsHere]

while we are poking holes in this... why not use pc104 instead of s-100?

Exactly. Any hobbyist who would consider this approach (PC104, RPi, or other cosmic embedded SBC) is most likely not interested in S-100. It is an inherently self-defeating strategy and it misses the point of being a S-100 hobbyist entirely!

Just go buy a Walmart PC since it would cost less and work better! Thanks and have a nice day!

Andrew Lynch

 

[eeguru]

The DP8422A DRAM board should be able to get to 128MB at least. Each DP8422A can access up to 64MB and if using a 72 pin SIMM. The DP8422A directly supports up to 4Mb DRAM chips so we would have to find the right SIMMs with compatible RAS/CAS lines. The nice thing about the 64MB 72 pin SIMMs is they are a more or less fixed standard package of traditional DRAMs. They don't use any of the synchronous state machine logic that were introduced with SDRAM (PC-100 and later 168 pin DIMMs). I am thinking a mezzanine with 4 DP8422A DRAM controllers and 4 64MB SIMMs is within reasonable possibility. It can also be done with 100% PTH parts and 5V compatibility.

I strongly suggest studying this interface design. It is designed to support burst access so you may be able to simplify it some always terminating the current cycle on each access. However fully understand it before attempting a layout.

Frankly, it adds a lot of complexity not to mention a whole suite of voltage compatibility issues with SDRAM and the FPGAs themselves and are sensitive to PCB trace issues (matched impedances and other issues). Almost certainly they would require expensive 4 layer PCBs.

Apparently you didn't even look at my board design above. All untrue.

We have to keep the end customer (the hobbyist) in mind when making the design choices and accept there are inherent limitations by staying in this genre. What is the point of making a memory board that hobbyists can't or won't build themselves? We will be stuck with boards that cannot generate enough demand to warrant even going to "production".

I'm not suggesting a hobbyist build a FPGA board. I suggest kickstarting a project for a generic FPGA boards with plenty of SDRAM (up to 64MB), 5V tolerant, and pinned in such a way that you could use them as a mezzanine module to add more ram to old designs. N8VEM and the S100 project already have 4MB per card SRAM board. Add a couple of those to a system and you can run Linux just fine. A question was posed how do we add 2GB to a 16 MHz 80386? I proposed programmable logic as really the only solution to get anywhere close. If you read the link above you'll see even the DP8422A design uses PLDs.

 

[monahan_z]

eeguru, I am now at the point that for the 16-32 Meg range I may as well stick with Pseudo-Static RAM chips. They are dirt cheap and if the data sheet is close to reality, simple to plop down. For flexibility I would have made (or buy) small SMT adaptors with pins (stamp size). This way for those who don't have steady hands they can have them soldered by outfits that do this and it would allow one to easily flip RAM from board (prototypes etc) to board. The trick will be for Andrew to squeezing as many as possible on a two layer S-100 board.

It's when you go to higher capacities that DRAM really starts to look attractive. Even 32 Meg using a DP8420 type setup seems to me marginal for the effort involved. Andrew’s 72 pin SIMMS and DP8422A at 128 MB starts to look attractive.

Question is there anything out there (controller) using 72 pin SIMM's that could get us to 256 or 512 MB on a single S-100 board other than essentially multiple DP8422's?