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11/73 question.

daver2

daver2

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OK,

My brain is slowly melting...

I am setting up a PDP-11 system from bits to erase some disks. I will then reconfigure it to keep.

I have a 173QZ-C3 Micro PDP11/73 BA23 system box.

The CPU board is a quad QBUS M8190 (KDJ11-B).

The memory board is a quad QBUS M7551-AH (MSV11-QA) 1 MB Parity memory board.

I have the CPU board in slot 1 and the memory board in slot 3 (at the moment). It was in slot 2. I have also used three different memory boards (the other two being National Semiconductor 4MB parity memory) with the same results.

I have also a DLV11-J and RQDX3 installed.

Now to the problem...

On boot I get ERROR 47 (Memory CSR error).

If I bypass the error, I then get ERROR 46 (Memory error).

If I enter ODT, I can open, change and check a few random memory locations, and things seem fine. In addition, I can see the DLV11-J and RQDX3 controllers when I perform a MAP. I have installed a DLV11-J loop back, and can use ODT to transmit a character (by writing into the transmit buffer) and I can see it returned to the receive buffer (with the correct status).

Does anyone know:

1. What to check next?

2. How can I abandon the power-on diagnostics and get into dialogue mode? I don't appear to be able to skip the testing when an error occurs.

Does anyone need any more information?

Dave
 
Is slot 2 empty? Sounds like it is from the description. If it is, then you need a bus grant card (M9047) in it.

If I've read poorly and slot 2 has something in it then never mind.

The KDJ11-B has no memory on it so if it's just sitting isolated in slot 1 then the messages make sense.
 
I did have the memory initially in slot 2 with the same results. I moved it to slot 3 for ease of exchanging it with other memory cards.

Whilst I appreciate you need a completely intact bus structure for interrupts and DMA, I don't think you require this for memory or I/O page transactions. In fact, the DLV11-J is way down the bus and is OK for reading and writing.

Dave
 
Last edited:
Just been reading up a bit more.

Is it possible that the EEPROM is configured for testing ECC memory and I have only parity memory fitted?

The key decision I have read is whether CSR bit 4 is read/write or not.

In the MSV11-Q manual, bit 4 of the CSR is stated as being reserved. But it also states that all positions of the register are read/write...

I can try with ODT to see if this is the case when I next have access to the machine.

This is one reason I was trying to get into dialogue mode - to see what this test setting was (for a full ECC test) and to change it if necessary.

Perhaps I need to be quicker with my ^C entry 😀!

I would also like to see which version of the firmware is installed.

Dave
 
Can anyone remember where the source code listing is for any version of the KDJ11 ROMs?

I am sure it is online somewhere - but I am either going blind or I can't find it.

Dave
 
That is possible - that is why I have tried it with 2 off 4 MB QBUS cards from National Semiconductors with the same results. I know for a fact that these cards were used with 11/73's - but I have many more dual height 73's than quad heights.

Based on those tests - I suspect that it is not the M7551 itself.

Dave
 
I see that the M7551 (MSV11-QA) comes in two (2) flavours: a revision A and a revision C. I observe that one of the revisions can be configured for 18 or 22 bit by a link setting.

I am in the office tomorrow, so I will see which revision card it is and how it is configured.

I will also see if I can do a few other tests to narrow the problem down further.

Dave
 
Well, I got a bit further today.

I found an M8637-EC 2MB ECC PMI memory board in one of my boxes. All that did was produce ERROR 56 on the CPU! I tried slot #1 for memory and slot #2 for CPU and slot #1 for CPU and slot #2 for memory with similar results.

I then tried various QUAD National Semiconductor memory boards I have. I either get ERROR 53 (no memory in location 0) or ERROR 47 (Memory CSR Error). I noticed that the cards are configured differently - so that may account for the different behaviour. I don't have (nor can find) the manual for these cards.

In desperation I found a DUAL height M8059-KP card and tried that - IT WORKED!

I do, however, get the 256KB 'shadowing' in memory (starting at both 00000000 and 02000000). This indicates (to me) that the card may be configured for 18-bit operation and not 22-bit operation? I will check the links when I get back into work. The machine then tries to boot - and fails. Not unsurprising because I have a load of empty slots between the CPU and the RQDX3...

Still, progress.

I am now wondering if the memory errors that the power-on test is detecting are actually real?

Dave
 
Ok. The reason cards need to be in series is because the interrupt and DMA grant request and acknowledge lines are passed from card to card. If there is a space the card can't do an interrupt request for the CPU to come and like.... service it.

PMI memory can be used as regular memory if you put it after the CPU, however I believe it can be damaged if plugged into a regular (non CD bus) slot. If you have a BA23 then the first three slots are Q bus on one side and CD interconnect, then the rest of the slots are Q22/Q22. Some early models of PMI memory that were for the 11/83 have timing problems with DMA if used as PMI memory but oddly enough work fine if used as regular Q Bus memory (putting them after the CPU instead of before it).
 
Thanks for the update. I did a lot of reading about PMI memory the other day, so most of what you posted is known to me. Thanks for confirming it though.

I checked the “bog standard” M8059-KP out that I had in the machine. It was (indeed) configured for 18-bit operation. I modified the link for 22-bit operation - but I got exactly the same results (with the memory appearing to shadow).

When I am next in work I will perform a test (using ODT) to see if modifying memory in the ‘low’ address range really does shadow in the ‘high’ address range (and vice-versa).

At this point in time I am suspecting a faulty CPU card or a faulty backplane. I am leaning more towards the CPU...

I will have a look at the PCB tracking for the higher address lines to see if I can see any physical damage with them.

The CPU card was not stored in the best of conditions (shall we say)...

The adventure continues...

Dave
 
Partial success...

I have previously identified that a 256KB RAM card (when configured for addresses 00000000 to 00777777) also 'reflects' between addresses 02000000 and 02777777.

I looked at the address bits, and the difference appears to be BDAL19. This is on connector BD1 of the QBUS connector.

On closer inspection of the 11/73 CPU card - what I thought was a bit of dirt was actually a damaged PCB - and the PCB track from the 11/73 electronics to the BD1 edge connector was actually broken. I confirmed this with a multimeter set to indicate continuity. A also found another PCB track that 'may' have had some damage, but the multimeter reading was fine.

Nevertheless, I repaired both tracks using a short piece of kynar wire.

I then only observed one (1) copy of the RAM between addresses 00000000 to 00777777...

I replaced the 256KB RAM card with my 4MB National Semiconductors card and the 11/73 is now happy and reports 4080KB RAM from address 00000000 to 17737776. I am not 100% sure as to how the NSC card is configured as I have no documentation for it. We have found documentation for an earlier card on Bitsavers though. I have a few spare cards, so I will test them as and when time permits.

My next problem is the RQDX3 disk controller - I will post this question next.

Dave
 
So, my current configuration is as follows:

Backplane DEC H9278-A (first three slots AB/CD).

SLOT #1 - EMPTY.
SLOT #2 - EMPTY.
SLOT #3 - 11/73 CPU (QUAD).
SLOT #4 - NSC 4MB QBUS MEMORY (QUAD).
SLOT #5 - AB - RQDX3 (DUAL). CD - DLV11-J (DUAL).
SLOT #6 - EMPTY.
SLOT #7 - EMPTY.
SLOT #8 - EMPTY.

The RQDX3 is connected to an RD52-A hard drive and an RX50 dual floppy. I 'think' I heard the RD52 spin up when I applied power at one stage.

I have set the 11/73 boot order to DU0, DU1, DU2 followed by DU3. I 'think' I have configured DU0 to be the RD52 and DU2/DU3 to be the RX50 drives (standard configuration).

The RQDX3 is seen in the I/O map of the 11/73.

I did note a slight discrepancy in the link setting of W23 for the RQDX3. 1-2 appears to be the default (according to the manual) but I had two (2) links fitted from 1-2 and 3-4. I have removed the 3-4 link to make it 'standard'.

Without the RQDX3 installed I get a message 07 - no bootable drives. Fair enough...

With the RQDX3 fitted (and connected to the disk drive cable) - and I also tried with the RQDX3 fitted but not connected to the disk drive cable - the boot process just 'hangs'. I get the power-up test sequence from 1 to 9 and then a hang.

I will test to make sure I have power on the two disk supply connectors.

I also have a couple of RQDX1 cards I can try in place of the RQDX3 (I will obviously have to add a bus continuity card).

Is my configuration of the slots OK (i.e. with slots 1 and 2 empty)? I could move the CPU to SLOT #1 and fit the other cards (and bus continuity cards) in around that.

I think there is a complete bus continuity chain from the RQDX3 to the DLV11-J, through the MEMORY card and to the CPU.

I am not sure whether the RD52 has been used with the RQDX3 or not before. If I remember correctly, the disk geometry configuration is stored on the disk drive for an RQDX3 and in firmware for the RQDX1 and 2.

Anyone else got any suggestions of where to go next?

Dave
 
Well, that is the plan. However, I need to boot XXDP from something - and I have the floppy disks...

One thing I am going to do next time I am in the office is to physically remove the RD52 so that is not part of the equation to confuse me.

Dave
 
I am getting side-tracked from getting the RQDX3 working though.

I at least should be able to see some activity on one of the RX50 drives.

Dave
 
Congratulations of the CPU board repair.
It might be worth trying VTserver to see if it might see the HDD.
 
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