Difference between 2 SRAM chips

[bitfixer]

Hi,

I'm wondering if anyone can help me to understand the difference between two SRAM chips in a piece of support hardware I'm building.
I've recently designed a board I'm calling the PETvet which is a RAM/ROM replacement for a Commodore PET. It connects to the 6502 socket in the pet and uses a single SRAM chip on the board to replace all of the RAM and ROM on the original PET motherboard.
Here's what is a bit confusing to me. In my initial design, I used a Hitachi 628128 SRAM chip (http://www.futurlec.com/Memory/628128.shtml), which has been working fine. In an attempt to lower the overall cost of the kit, I ordered a few Alliance AS6C1008 (http://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&ved=0CCAQFjAA&url=http%3A%2F%2Fwww.alliancememory.com%2Fpdf%2FAS6C1008%2520feb%25202007.pdf&ei=2mwPT7H-PKOriAKs5dHSDQ&usg=AFQjCNEuDd3ACHGShMFBJQhmZ51sBBvLdg), which were quite a bit cheaper.
While the Alliance chip has the same pinout, and actually has a faster access time (55ns vs 70ns), the PETvet just doesn't work with the Alliance chip. When using it only as a RAM replacement, I see strange garbage written into memory, and when used as a ROM replacement as well the PET does not boot properly. I'm assuming that some subtlety of the chips is different enough that one works in the design while the other does not..
If anyone cases to take a look, please let me know if you see any obvious/significant differences between the chips. In the meantime I'll just use the more expensive hitachi chip in the design.. Thanks!
- Mike

 

[Chuck(G)]

The datasheets are similar enough that I'd be a bit surprised if there were a significant difference.

What does your chip select, address setup and write enable timing look like? The devil's in the details on these things. Given the speed of the PET, I'd be surprised if there were a significant difference.

Did you get the Alliance parts from Futurlec? The last time I ordered from them, they were shipping Wingshing 128KB SRAMs.

 

[orgwood]

I am not an expert on either chip but when looking at the Alliance timing notes on page 6 for the write cycles, there seem to be quite a few conditions that have to be met before data is written. Maybe the Hitachi chip doesn't have an output latch with these critical timing restrictions? I again looked at the specs and the Alliance chip has a VH min input of .7 of VCC or at least that's what I think it is. Are you sure you are meeting this spec? That's quite high for a TTL compatible device...normally 2.4V or so. DaveC

Hi,

I'm wondering if anyone can help me to understand the difference between two SRAM chips in a piece of support hardware I'm building.
I've recently designed a board I'm calling the PETvet which is a RAM/ROM replacement for a Commodore PET. It connects to the 6502 socket in the pet and uses a single SRAM chip on the board to replace all of the RAM and ROM on the original PET motherboard.
Here's what is a bit confusing to me. In my initial design, I used a Hitachi 628128 SRAM chip (http://www.futurlec.com/Memory/628128.shtml), which has been working fine. In an attempt to lower the overall cost of the kit, I ordered a few Alliance AS6C1008 (http://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&ved=0CCAQFjAA&url=http%3A%2F%2Fwww.alliancememory.com%2Fpdf%2FAS6C1008%2520feb%25202007.pdf&ei=2mwPT7H-PKOriAKs5dHSDQ&usg=AFQjCNEuDd3ACHGShMFBJQhmZ51sBBvLdg), which were quite a bit cheaper.
While the Alliance chip has the same pinout, and actually has a faster access time (55ns vs 70ns), the PETvet just doesn't work with the Alliance chip. When using it only as a RAM replacement, I see strange garbage written into memory, and when used as a ROM replacement as well the PET does not boot properly. I'm assuming that some subtlety of the chips is different enough that one works in the design while the other does not..
If anyone cases to take a look, please let me know if you see any obvious/significant differences between the chips. In the meantime I'll just use the more expensive hitachi chip in the design.. Thanks!
- Mike

 

[orgwood]

gubbish, just wondering if you read my edited post? The VH min input of .7 VCC means that if you are running a 5V VCC, you have to reach .7 x 5V or 3.5V for a "MINIMUM" "1" level...at least that's the way I read it. You can use pullup resistors to achieve a higher level than the standard TTL active high minimum of 2.4V but they may be too slow if the system timing is fast. Fortunately the active high sourcing output should get you to 2.4V and then the pullup resistors only have to take it the next 1.1V - not the whole way from the TTL low of the sinking output...what's that level again? 1.1V max? Not sure if this is your problem but thought I'd throw a little more explanation at you from what I can tell. DaveC