So I looked up the schematic for the "Enhanced" 80 column card with 64K, and there's almost nothing to it; it's literally just a bank of 4164 DRAM with a '245 buffer on the "CPU" data bus, a 74LS374 latch on the "video" data bus, and linkage to already defined RAS/CAS, buffer control, and latch control lines. So it is "just memory". On the flip side I can't find the schematic to the text only card, but looking at a picture of it I think I can guess how it works; it has *two* 74LS374s and 74LS75 4-bit latch on it; I assume it's using the extra two latches on RA0-7 to get the top two bits of the 10 bit address needed for 1K of memory... and that's all there is to it. So it's also "just memory". Without the schematics I'm not entirely clear on how the Apple IIe tells the two apart, IE, is there a different control line the smaller card uses, or does the Apple II just test two locations in AUX memory spaced 1K apart and see if they're duplicates or not, it could just be the latter.
Anyway, I'd say the conclusion here is it would take more work to hack those 1K cards to 64K than it would to just build a new card. You could make a 64K card from scratch using just four chips. (The buffer, the latch, and two 4464 DRAMs.) To convert the 1K card using SRAM you'd need to make a complete mess of patch wires and probably substitute a wider latch for that 74LS75. That said, I guess to get back to the OP, I guess the question there is if the RGB encoder and RAM portions of that RGB card are completely independent or if the RGB encoder does "something" to directly access the RAM buffer. If the memory circuitry on that RGB card is the same as the 1K 80 column card and the RGB encoder *only* concerns itself with the pixelated data present on those video specific lines then I guess it opens up the possibility of lobotomizing the 1K of memory on it and swapping it for 64K. If I were to attempt it I guess I'd probably remove any address latches and put a pair of 4464 DRAMs on a piggyback board connected to the RAM bus lines (RA0-7 and the bus segment between the CPU data bus and the video bus latch.)...
Edit: I mean, I guess you could test that "lobotomize the SRAM and piggyback some DRAM" plan on one of the 1K text-only cards before doing it to your RGB card, if you were really going to try to go there.