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HardMPU <working title>, anyone here an EE?

JDallas said:
Playing by the odds, its best to double-check your circuitry first, literally. Its very easy to get so close to a circuit that when checking it, assumptions leap-frog past dutiful checking. I've found that checking it in reverse order to disrupt assumptions helps. If I check it again, I use a different sequence, a helpful technique of disrupting what one expects to find.

You might want to add a few LEDs with the spare gates so you can give your self some feedback in the firmware. Maybe its enough to have the serial port converted to RS232 on the prototype board and feed it back to the PC for messages from the firmware.

If you have the tools, you might write an application program on the PC to interface with the board. Do a loopback and such before throwing the Hail-Mary pass to find out if it all works perfectly in MIDI first try.

One mistake I see a lot in electronic hobby advice boards is someone suggesting the first thing to do is replace a chip... buy another and see if it works. BAD ADVICE. If a board is wire-wrapped or breadboarded, the odds a heavily favoring a mistake there just in the hand assembly of the board. Replacing chips or "Shot-gunning" as its called, should only be a quick attempt if you're dealing with a production board that has apparently been tested out and proven by at least the number that have been sold. Only if a product has been on the market and sold enough, can you really assume its likely not the board or the assembly. Of course such pristine circuitry can not be assumed in wire-wrapped or breadboarded prototypes; if the connections are all correct, you could have a bad wire, a bad wire-wrap contact or other insidious little bugs to find with deduction and inspection.
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All good advice. I was using DOS debug to read and write directly to the I/O ports, that's is how I found that my address lines were slightly out of order. I'll definitely be making use of JTAG and the UART for debugging. And the logic probe is always a big help as well.
 
Nevermind, I just re-read your previous post and found the answer there regarding the 74'25. I guess I do need a high resolution copy of that schematic, it looks like an AND gate from here, not a NOR gate as in the case of the 74'260. Thanks.
 
JDallas said:
When you get some time to document that aspect of DOS, I'd like to read it. I can do a lot of tricky things in DOS, but I don't recall how to set up I/O port manipulation. Maybe you're using a program under DOS?
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DEBUG is included with a standard MS-DOS install. Running it will present you with a command line interface. To use for I/O manipulation, you can for example type 'i 330' to get back a hex value of what is at port 330. Similarly, 'o 330 3f' will write 3f to port 330. It has many other useful commands for debugging, but I am not an expert in the overall usage of DEBUG.

JDallas said:
Ah, I think that's do to gate inversion or duality. A standard NOR gate in negative logic is and AND gate to all its inputs having INVERSIONS (the circles). You can find the negative of AND/OR/NAND/NOR by (1) switching the gate outline (AND to OR, or OR to AND) and (2) remove inversion "bubbles" on the original and put them on all the pins that didn't have it in the original.
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Ohhhhh, ok. So basically the same trick I used for combining the flip-flop reset signals with an AND gate. I get it now :)

One thing I did run into was the fact that 74'260 chips seem to be around $2.60 each. Less if ordering in bulk from China, but I think they were still near $2 in that case. I guess I will have to explore the various chip options and add up the costs of both versions of the schematic before deciding which way to go.

JDallas said:
Ok, I'll find my temporary image website and send you a VCF message tonight with the URL.
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I will PM you my email address so you don't have to mess with uploading it. Thanks again.
 
Success! After some software debugging, I now have a working UART implementation on a breadboard. Now to start porting the intelligent part.
 
JDallas said:
Since the '25 and '260 are a purchasing problem, this version D should help.
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Awesome. Thank you. Since logic chips are generally cheap, I think I will be ordering the parts to try out version D and E.

In other news, intelligent mode mostly works with "version A" at this point. Hackish code here, to be cleaned up later: https://github.com/ab0tj/HardMPU
I tested last night with Silpheed, and it does work. However, I noticed some stuttering and stuck notes. I will be doing some more testing to see where the problem lies.
 
Did the latest git fix resolve the issue above? Watching with interest.

OTOH I'm preparing to try your design on an ISA protoboard. You are still testing using this design, right? http://www.vogons.org/download/file.php?id=19258&mode=view

Since my board space is limited I'll try to fit several chips from the glue logic in a GAL or two. We'll see how this goes. It will take some time since my Atmega1284s are on a slowboat from China. :)
 
jh1523 said:
Did the latest git fix resolve the issue above? Watching with interest.

OTOH I'm preparing to try your design on an ISA protoboard. You are still testing using this design, right? http://www.vogons.org/download/file.php?id=19258&mode=view

Since my board space is limited I'll try to fit several chips from the glue logic in a GAL or two. We'll see how this goes. It will take some time since my Atmega1284s are on a slowboat from China. :)
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Over the past few days, I've been transferring my prototype on to a protoboard so I can debug in a different computer. Hopefully I'll have that finished up today. If it ends up being a problem with the code, I'll push that to the git as soon as I find it.

That is the design I've been working with for now. I want to try out what JDallas has been working on, but I'm waiting for parts. If you end up designing a GAL, and you're willing to share that design, that might be worth looking into using for the final HardMPU design as well.
 
Definitely I'll share, but I have to find some time to learn to program GALs, and debug that type of hardware. I've done some CPLD work in the past, as an amateur only. I have a few 22V10s and 16V8s and I hope to condense a few glue chips into one.

(edit) a quick analysis shows that most of the ICs (except for the 1284, the 2x374 and the optocoupler of course) could possibly fit in a 22V10, with one caveat: making the I/O address fixed, as there wouldn't be enough pins to implement the selection jumper block. The alternative would be to leave the bottom 138 outside the 22V10 with the jumper block, that way the pin number is not exceeded.
In the first case you reduce the number of ICs from 11 to 5 but you lose address selection; in the second case you reduce from 11 to 6 and retain address selection.
 
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jh1523 said:
Definitely I'll share, but I have to find some time to learn to program GALs, and debug that type of hardware. I've done some CPLD work in the past, as an amateur only. I have a few 22V10s and 16V8s and I hope to condense a few glue chips into one.

(edit) a quick analysis shows that most of the ICs (except for the 1284, the 2x374 and the optocoupler of course) could possibly fit in a 22V10, with one caveat: making the I/O address fixed, as there wouldn't be enough pins to implement the selection jumper block. The alternative would be to leave the bottom 138 outside the 22V10 with the jumper block, that way the pin number is not exceeded.
In the first case you reduce the number of ICs from 11 to 5 but you lose address selection; in the second case you reduce from 11 to 6 and retain address selection.
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Awesome. I think keeping address selection would be important, as people may need to change the address to let the card coexist with sound cards, another MPU, etc. That's still a nice reduction in parts count.
 
JDallas said:
You might want to look at one of the versions B-F, they have less circuitry. They could do the jumper selection with two input pins selecting a binary value 0-3 costing just two pins. I don't know what part you're looking at so I can't really offer more until I get a datasheet.
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That's really not possible as I'm looking at using every single pin: 13 ins, 9 outs, total 22, none to spare. If there was something as a 24V10 it would be possible - but to my knowledge there isn't. We would be getting into CPLD territory, which is not a bad idea except that 5V-capable CPLDs are a thing of the past. A 9536 or 9572 would be able to accommodate all the circuitry except for the MPU and the optocoupler, and all the pins needed - but good luck finding one. The newer XL versions are in principle 5V-tolerant but in reality aren't quite so, they die quickly in a 5V environment.
 
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JDallas said:
I'll try to do a block diagram Wednesday night for these CPLD/SPLD options.

CPLD:
I think the CPU-to-ISA section fits into one Atmel ATF1500 CPLD. 32 Pins of I/O + 4 pins of special input but that not a PDIP part - a 44 pin PLCC in a thru-hole socket assuming they still make those.

You'd modify the system boundaries so that the CPU once again does a bidirectional bus, and the single IRQ output would got to an external 6x2 header to select to interrupt. The A4:A5 port selection would be set by 2 pins binary format. Combine the 6x2 header and these 2 pins and you have a nice 8 switch DIP.

You could use all 11 pins of address A0-A9 and AEN#. You still get the double RESET (ISA or CPU).

SPLD:
It looks like it would take two and maybe one logic chip.

SAVING PINS OTHERWISE:
Instead of two unidirectional buses to the CPU, a single bidirectional bus with a RD# and WR# signal. That could be compressed to nibble-wide but would require another signal.

Instead of 10 address lines, you could use 7 like the MPU-IPC-AT.

A single quad NOR gate would save 4 inputs (not necessary with the ATF1500). Three negative logic NOR to AND 3 pairs of low address and AEN# plus the last gate as positive logic NOR to implement resets from the ISA.RST and CPU.RST
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I don't care if it's not PDIP, I can do SMT easily. It appears that the Atmel ATF1500 come as PLCC44, which is as good as PDIP as you can socket them. That said I'm not familiar with the ATF1500 series, I didn't actually even know Atmel made CPLDs... I'm mostly used to Altera and its tools, with a bit of Xilinx thrown in for good measure. It's cool that there still are 5V CPLDs around. I just ordered a small batch of ATF1502AS to play with. I found them at about $1.50/pc including shipping in batches of 10 from China. Also found some ATF1504AS in PLCC84 at about the same price, got a few of those too for good measure. Pins galore. Now I only have to wait a month for delivery. :) Time enough to play with Atmel's software I guess.
 
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JDallas said:
PDIP and through hole is a design criteria of the project, hence the ATmega128(4) 40pin PDIP.
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Through hole, yes. PDIP, though, is not expressly necessary. For example, PLCC would work since there are through-hole sockets. The end goal is to be able to offer this as a kit for those who don't care to source all their own parts, program the MCU, etc. And even though I can solder (larger) SMD parts just fine, I'd rather not be soldering chips down to every board that goes out the door. Many kit builders seem to shy away from things that require soldering SMD.
 
JDallas said:
Really, a Atmel ATF1500 in a 44 pin PLCC socket. Why didn't I think of that... oh... I did. ;)
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I don't know that anyone here was disagreeing with you on that point :) I was only saying that it would not be a problem to go that direction. The only reason I haven't pursued a CPLD or the like is that I want to at least get a prototype up and running before tackling something like learning Verilog or VHDL.
 
JDallas said:
No. Its in your message quote string. Any updates I do don't affect that. You just didn't read it.
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It's in my reply as a quote because you edited your post between the time I loaded the page and the time I hit the reply button. I'm a slow reader. Oh well. Whatever. If you want it so much I concede your precedence on this groundbreaking idea.
 
ab0tj said:
I don't know that anyone here was disagreeing with you on that point :) I was only saying that it would not be a problem to go that direction. The only reason I haven't pursued a CPLD or the like is that I want to at least get a prototype up and running before tackling something like learning Verilog or VHDL.
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You don't necessarily need VHDL or Verilog for FPGA/CPLD work. Many software packages have a "schematic entry" mode where you don't write code but rather draw the circuit.
 
jh1523 said:
You don't necessarily need VHDL or Verilog for FPGA/CPLD work. Many software packages have a "schematic entry" mode where you don't write code but rather draw the circuit.
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I'll be investigating that option after I get this first prototype up and running so I can finish developing the software. If you don't beat me to it, that is. Then I will be weighing the decision on which way to go mainly based on cost and availability, as the wiring complexity doesn't matter much when PCBs are made up for this project, only board size and parts cost.
 
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