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HIMEMV2 or equivillent PROM

ibmapc

ibmapc

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Apr 5, 2010
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Albany, OR USA
If your not familiar with the HIGHMEMV2, see the folowing View attachment 1megXT.txt.It is a chip that replaces the rom in socket u44 on the IBM 5160 XT Motherboard to address memory up to 1 meg. I did the mod for 640KB on the motherboard about 25 years ago. So I have 256k chips in banks 0 and 1. I have enough 256k chips that I pulled from another board to fill the other two banks. I realize that the added memory will only give me about 64k of Contiguous base memory, but I believe there is a good size chunk of other unused memory between 640K and 1 Meg that could be used as UMB to load device drivers like Network drivers etc. using something like Quarterdeck Cram.
Chuck(G) had mentioned using a GAL to replace the rom, but I don't have the technical expertise to burn one properly. I'd be willing to pay for the chip plus shipping and any other costs incurred (within reason of coarse). I had also hi-jacked a thread in PC's AND CLONES that discussed this same topic, but that thread has gotten a little long and has not attracted much interest lately, so I decided a new thread here might get the right person or persons interested. Anyone willing to help me with this project, please PM me or E-mail me at gregsaling@comcast.net
 
No takers yet?
Maybe I can make things more interesting? I've got some old parts that I might be willing to trade. For example, I have a IBM 5160 case with a power supply. I also have an IBM CGA Card, a 1.2 meg 5-1/4 floppy drive. I'm sure there are people out there with the skills required. I just haven't made things attractive enough!!

Regards,

Greg
 
Tell you what. I'll burn a 20-pin GAL and indicate what pins are what--you make up an adapter to fit the 16-pin existing PROM socket. 82S23 PROMs are very hard to come by nowadays--just ask any of the arcade gamers. A GAL would do the job easily.

I can provide the GAL in DIP or 20-pin PLCC, which is quite tiny--you could even make up a small PCB with pins to fit a 16-pin DIP socket and stick the PLCC on it.

But I don't have a genuine 5160 any more, so all I have is the document you've cited to work from--I think I understand it.
 
Awsome, thanks for taking time to help me with this project. I was thinking that a 20 pin dip would be pretty easy to adapt to the 16 pin socket if most of the pins line up by modifying a 20 pin socket (I work as a machinest and can modify small parts at work if necessary). However, if you think the PLCC would be a better way to go then I'll have to learn how to make up a PCB. Let me know what you think.

Thanks for your help.

Greg
 
It doesn't really matter to me--they program the same way. I think I can get most of the pins to line up--let me play around a bit. At least most of the address lines are on the left side and the data output lines are on the right side of the 82S23, so it's not beyond hope that we'll get at least most of them to line up.
 
Chuck(G) said:
It doesn't really matter to me--they program the same way. I think I can get most of the pins to line up--let me play around a bit. At least most of the address lines are on the left side and the data output lines are on the right side of the 82S23, so it's not beyond hope that we'll get at least most of them to line up.
Click to expand...

Actually only 3 of the 4 data lines are used, and each configuration is only 16 words, so a 16x3bit memory would be enough to store a single desired configuration. However, then switches 3/4 and jumper E2 won't do anything.

Two of the data lines will select the bank number, and the third data line just enables the bank sellected. Here is a thruth table:
Code: 
D3
|D2
||D1
|||D0
||||
vvvv
xxx0 = Segment not mapped to any RAM bank
x001 = Segment mapped to RAM bank 0
x011 = Segment mapped to RAM bank 1
x101 = Segment mapped to RAM bank 2
x111 = Segment mapped to RAM bank 3

The segment number is presented directly on A0-A3 of U44, where the rest of the Ax lines are connected to switches 3/4 and jumper E2 (as a way to select between up to 16 different configurations).
 
In any case, Greg, you can do me a great favor by transcribing the data from the document into a 16 row by 16 column simple text file.

In other words, consider the HIMEMV2 ROM as described:

Code: 
                        HIMEMV2 U44 DECODER PROM PROGRAM

     BOTH JUMPERS INSTALLED
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
      Seg# >>>=====>  0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
     (4 banks of  0 = 9  9  9  9  B  B  B  B  D  D  D  D  F  F  F  E  = 928K
     256K chips)  1 = 9  9  9  9  B  B  B  B  D  D  D  D  E  F  F  E  = 864K
                  2 = 9  9  9  9  B  B  B  B  D  D  D  D  E  E  F  E  = 800K
                  3 = 9  9  9  9  B  B  B  B  D  D  D  D  E  F  E  E  = 800K

     E2 JUMPER 3 to 4 ONLY
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
      Seg# >>>=====>  0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
     (Misc.       4 = F  F  F  F  D  D  D  D  B  B  B  E  9  9  9  E  = 896K
     arrangements)5 = F  F  F  F  D  D  D  D  B  B  B  E  E  E  E  E  = 704K
                  6 = 9  9  9  9  B  B  B  B  D  F  E  E  E  E  E  E  = 640K
                  7 = 9  B  D  F  E  E  E  E  E  E  E  E  E  E  E  E  = 256K

     E2 JUMPER 1 to 2 ONLY
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
      Seg# >>>=====>  0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
     (Up to 4     8 = 9  9  9  9  B  B  B  B  D  D  F  E  F  F  D  E  = 896K
     banks of     9 = 9  9  9  9  B  B  B  B  D  D  F  E  E  F  D  E  = 832K
     256K chips)  A = 9  9  9  9  B  B  B  B  D  D  E  E  F  F  D  E  = 832K
                  B = 9  9  9  9  B  B  B  B  D  D  E  E  E  F  D  E  = 768K

     NO JUMPERS INSTALLED
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
      Seg# >>>=====>  0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
     (Up to 3     C = B  B  B  B  D  D  D  D  F  F  E  E  E  9  F  E  = 768K
     banks of     D = B  B  B  B  D  D  D  D  F  F  F  E  E  9  E  E  = 768K
     256K and     E = 9  B  B  B  B  D  D  D  D  F  E  E  E  E  E  E  = 640K
     1 of 64K)    F = 9  B  B  B  B  D  F  E  E  E  E  E  E  E  E  E  = 448K

Go down each of 16 columns and invert (rows to columns and vice-versa) the arrangement. So, for the first row, we'd go down the entire 0 column and write:

9999FF999999BB99

The second row would be:

9999FF9B9999BBBB

and so on, for 16 rows. It would save time for me, particularly if you double-checked your copy.

If you wanted to put some icing on the cake, you could do the same for the original table as described in the document.
 
Just to save me a bit of work, what settings as described in the document for the new PROM are you most interested in? It would seem that the first and third are the most valuable ones.
 
Chuck(G) said:
Just to save me a bit of work, what settings as described in the document for the new PROM are you most interested in? It would seem that the first and third are the most valuable ones.
Click to expand...

If you are talking about the section with this heading "E2 JUMPER 1 to 2 ONLY" when you mention the "third" setting, then that is the one that I'd be most likely to use with ;

"SW2 4 & 3 = 11 (both open)==========> 640K plus segments D and E
(OK with EGA and Hard Disk)"

As I do have a hard disk(Silicon Valley Computer ADP50 adapter with 2 CF cards attached by IDE to CF adapter) and an ATI EGA Wonder.

PS I have also considered removing the EGA Wonder and putting the CGA back in then I'd set the switches as follows;

SW2 4 & 3 = 01 (4 closed, 3 open)===> 640K plus Segments A, D, and E
(OK with Hard Disk but no EGA)
 
Last edited:
I'm talking about these two:

Code: 
     BOTH JUMPERS INSTALLED
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
      Seg# >>>=====>  0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
     (4 banks of  0 = 9  9  9  9  B  B  B  B  D  D  D  D  F  F  F  E  = 928K
     256K chips)  1 = 9  9  9  9  B  B  B  B  D  D  D  D  E  F  F  E  = 864K
                  2 = 9  9  9  9  B  B  B  B  D  D  D  D  E  E  F  E  = 800K
                  3 = 9  9  9  9  B  B  B  B  D  D  D  D  E  F  E  E  = 800K

    E2 JUMPER 1 to 2 ONLY
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
      Seg# >>>=====>  0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
                      =  =  =  =  =  =  =  =  =  =  =  =  =  =  =  =
     (Up to 4     8 = 9  9  9  9  B  B  B  B  D  D  F  E  F  F  D  E  = 896K
     banks of     9 = 9  9  9  9  B  B  B  B  D  D  F  E  E  F  D  E  = 832K
     256K chips)  A = 9  9  9  9  B  B  B  B  D  D  E  E  F  F  D  E  = 832K
                  B = 9  9  9  9  B  B  B  B  D  D  E  E  E  F  D  E  = 768K

The other two sets appear to be of limited use. Do I understand this correctly?
 
I think we're on the same page. The "E2 JUMPER 1 to 2 ONLY" is what I had planned on using. On My motherboard e2 1-2 are connected by a soldered in wire that My Dad installed way back in the late '80s when we did the 640K mod.
 
Okay, if we use the first and third tables as described above, we can come up with a GAL16V8
with a pin setup like this:

Code: 
                            Chip diagram (DIP)

                             ._____    _____.
                             |     \__/     |
                          A6 |  1        20 | Vcc
                          A5 |  2        19 | A7
                          A4 |  3        18 | 
                          A3 |  4        17 | 
                          A0 |  5        16 | Q0
                          A1 |  6        15 | Q1
                          A2 |  7        14 | Q2
                             |  8        13 | 
                             |  9        12 |
                         gnd | 10        11 | 
                             |______________|

Note that Q3 isn't connected on the 5160 schematic and CE1, CE2 are always enabled. Rather than 4 tables, you get two, with duplicates.
 
Great!
If I am interpretting your pin out correctly the only pin that will not line up directly is number 10. So I should be able to leave #8 disconnected and run a jumper from # 10 on the GAL to #8 on the motherboard socket. Do I need to do any thing with the other pins that are not used(#'s 13,17,18 )? Should they be left open or grounded?
 
Unlike regular CMOS, you can leave GAL pins open--the programming can essentially power off the circuitry associated with NC pins to save power. It really doesn't matter what you do with them. You can ground them if you like.

I've run the simulation on the GAL and the output looks good.

Unless you can program your own GALs and just need the JEDEC files, PM me with your address and I'll send you a programmed GAL to try out.
 
Last edited:
PM Sent. Thanks again Chuck(G)! I Can't wait to try it out! In my previous post I mentioned that I planned to leave pin 8 on the GAL disconnected and run a jumper form pin 10 to socket connector 8 gnd. However, based on your reply, I believe that I can leave pin 8 connected so that pin 8 and 10 would be connected to ground. That would be a little easier since to make pin 8 NC I would have to either cut it off the chip or modify the socket adapter so that pin 8 would be insulated. Sorry if I'm rambling on. So what do you think. Can pin 8 be grounded safely?
 
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