probably the same, see post #36 / #37 above, IBM did things like that, If you can dump it we can check.No idea if the data is any different.
| VCF Latam | Apr 24 - 26, 2026, | Bahía Blanca, Argentina |
| VCF Pac. NW | May 02 - 03, 2026, | Tukwila, WA |
| VCF Southwest | May 29 - 31, 2026, | Westin Dallas Fort Worth Airport |
| VCF Southeast | Aug 01 - 02, 2026, | Atlanta, GA |
| VCF West | Aug 01 - 02, 2026, | Mountain View, CA |
| VCF Midwest | Sep 12 - 13, 2026, | Schaumburg Convention Center, IL |
| VCF Montreal V2.0 | Nov 07 - 08, 2026, | Saint-Lambert, Montreal, Canada |
| VCF SoCal | See you in 2027, | Southern CA |
| VCF East | Apr TBD, 2027, | InfoAge, Wall, NJ |
probably the same, see post #36 / #37 above, IBM did things like that, If you can dump it we can check.No idea if the data is any different.

Various possibilities.So what do we have here? Just an internal revision that never made it into the wild?

MOVs to segment registers (rev. 2 tends to PUSH/POP into those)CMOS_READ/CMOS_WRITE routines)NOPsSHUT1 routine in module TEST1.bios:0A2D ;----------------------------------------
bios:0A2D ; RETURN 1 FROM SHUTDOWN :
bios:0A2D ;----------------------------------------
bios:0A2D
bios:0A2D SHUT1:
bios:0A2D B0 21 mov al, 21h ; '!' ; <><><><><><><><><><><><>
bios:0A2F E6 80 out MFG_PORT, al ; <><> CHECKPOINT 21 <><>
bios:0A31 BC 30 00 mov sp, STACK
bios:0A34 8E D4 mov ss, sp
bios:0A36 BC 00 01 mov sp, @TOS ; * stack ptr specified as 0030:0100 (=r1) *
bios:0A36 ; * r2 defines ABS0:@TOS = 0000:0400 *
bios:0A39 ;----- SET DIVIDE 0 VECTOR OFFSET
bios:0A39
bios:0A39 2B FF sub di, di ; * zero ES as in r2 (not done in r1) *
bios:0A3B 8E C7 mov es, di
bios:0A3D assume es:nothing
bios:0A3D B8 EC 18 mov ax, offset D11
bios:0A40 AB stosw
bios:0A41 B8 40 00 mov ax, DATA ; * r2 uses CALL DDS here instead *
bios:0A44 8E D8 mov ds, ax ; * of these two instructions *
bios:0A46
bios:0A46 ;----- GET THE CONFIGURATION FROM CMOS
bios:0A46
bios:0A46 B0 8E mov al, DIAG_STATUS
bios:0A48 E6 70 out CMOS_PORT, al ; * r2 uses CALL CMOS_READ *
bios:0A4A EB 00 jmp short $+2
bios:0A4C E4 71 in al, CMOS_DATA
bios:0A4E A8 C0 test al, BAD_BAT+BAD_CKSUM
bios:0A50 74 03 jz short M_OK
bios:0A52 E9 91 00 jmp BAD_MOS
bios:0A55
bios:0A55 M_OK:
bios:0A55 8A E0 mov ah, al
bios:0A57 B0 8E mov al, DIAG_STATUS ; * r2 uses CALL CMOS_WRITE *
bios:0A59 E6 70 out CMOS_PORT, al
bios:0A5B 86 C4 xchg al, ah
bios:0A5D 24 DF and al, 0DFh
bios:0A5F E6 71 out CMOS_DATA, al
bios:0A61
bios:0A61 ;----- CHECK FOR CMOS RUN IN MODE
bios:0A61
bios:0A61 81 3E 72 00 34 12 cmp word ptr ds:@RESET_FLAG, 1234h
bios:0A67 74 15 jz short M_OK_64
bios:0A69 B0 96 mov al, M1_SIZE_HI
bios:0A6B EB 00 jmp short $+2 ; * r2 uses CALL CMOS_READ *
bios:0A6D E6 70 out CMOS_PORT, al
bios:0A6F EB 00 jmp short $+2
bios:0A71 E4 71 in al, CMOS_DATA
bios:0A73 24 C0 and al, 0C0h
bios:0A75 3C C0 cmp al, 0C0h ; '+'
bios:0A77 75 05 jnz short M_OK_64
bios:0A79 C6 06 72 00 64 mov byte ptr ds:@RESET_FLAG, 64h
bios:0A7E
bios:0A7E M_OK_64:
bios:0A7E
bios:0A7E B0 94 mov al, C_EQUIP ; * ...and here too *
bios:0A80 EB 00 jmp short $+2
bios:0A82 E6 70 out CMOS_PORT, al
; [...........]
The "25/05/90" pair also don't have an FRU - for further context (going off-topic from an AT BIOS aspect), the 35SX/40SX had two later releases that were archived, which I also tested with an ISA adapter from SIIG that only had a ROM BIOS extension (with the IDE interface not populated) for adding LBA support to an[other] onboard IDE interface. It didn't work for the '06'h BIOS of the 35SX/40SX (04 APR 1991) but did for the '0A' revision (25 SEP 1991). Of course, IBM didn't add LBA support in the main system BIOS for the planar IDE connection. I spotted another BIOS pair on a picture of a 35SX/40SX planar that were later *dates* (14 MAR 1992 for EVEN, 12 MAR 1992 for ODD) that I wasn't able to archive or know a reported version (with any added abilities).In terms of photos, all we have is what was provided in the original ebay auction (116575091863). Unfortunately they were sold loose, with no indication about the type of mainboard they were originally coupled with (if any).
Refer to the two at the top:
View attachment 1308117
For what it's worth, the other "25/05/90" pair was determined by Tom of ardent-tool to be an early revision of the PS/2 Model 35 SX and 40 SX firmware (more details in the previously linked thread). What that could mean about the ultimate source of this lot is anyone's guess.
Anyway, they sure don't look as 'professionally printed' as your average BIOS ROM from IBM. And in the absence of any official mention of these FRU/BIOS part numbers, there's no evidence that they were part of a commercially available system.
As I noted, it's of course possible that they were meant for a different product with a 5170 mainboard, *if* the firmware was interchangeable. Considering your examples of the 5273 and 7532, that's a possibility.
Is there a corresponding list of BIOS part numbers for those two products, or for anything else in the 5170 "family"?
The "25/05/90" pair also don't have an FRU - for further context (going off-topic from an AT BIOS aspect), the 35SX/40SX had two later releases that were archived, which I also tested with an ISA adapter from SIIG that only had a ROM BIOS extension (with the IDE interface not populated) for adding LBA support to an[other] onboard IDE interface. It didn't work for the '06'h BIOS of the 35SX/40SX (04 APR 1991) but did for the '0A' revision (25 SEP 1991). Of course, IBM didn't add LBA support in the main system BIOS for the planar IDE connection. I spotted another BIOS pair on a picture of a 35SX/40SX planar that were later *dates* (14 MAR 1992 for EVEN, 12 MAR 1992 for ODD) that I wasn't able to archive or know a reported version (with any added abilities).
Sounds like it is a time to start laying out a table like https://www.ardent-tool.com/firmware/system.html
SET_FORMAT) adds a fourth format type to rev. 1's three. Otherwise it's similar to the rev. 1 routine, however (in rev. 2 it's completely rewritten).Tomas has listed the internal FRU, which he says has the same part number as the Model 25 286 / Model 30 286 (same planars used) 16-bit ROM (since the "25/05/90" pair are 8-bit EPROMs, both internal [code header] and external [label] would be different) - and he put the external date marking in quotes. Sometimes we see the initial BIOS version with a similar FRU sequence, which makes sense, of course. And (of course) we often find missing sequential BIOS versions / missing initial versions (after the model was released) - or duplicated internal code with a different FRU header (like this one).Ouch - PC/XT/AT firmware is straightforward next to the PS/2 stuff... is the FRU for that pair simply not listed in references which do include later revisions? Or could it still be hiding in some as-yet-undiscovered source?
In both the initial system BIOS version and on adapter microcode......Sometimes we see the initial BIOS version with a similar FRU sequence, which makes sense, of course...


@MFG_TST ( = 0040:0012, in the BIOS Data Area). When doing so, it does preserve bit 3 (the other "reserved" bits are cleared). But as far as I can tell, this bit is never used or checked again at any point in the BIOS code.Tony alluded that one of the units he got was a "Skyrocket" - although he passed away long ago, and I don't know what happened to the computer stuff he had (I was interested in Gearbox parts): https://groups.google.com/g/comp.sys.ibm.ps2.hardware/c/9libo3DblGQ/m/N-Cis5lVdwYJThis may be a good time to bring up a curious little puzzle in IBM's 5170 BIOS listings.
The 8042 keyboard controller's input port (send C0h to port 64h, then read port 60h) provides data on some switch settings - including the one that sets the on-board memory size (in bit 4).
All three versions of the AT tech ref (corresponding to the 3 BIOS revisions) describe bit 3 of this field as "reserved":
View attachment 1309247
However, in the source listings for the rev. 2 and rev. 3 BIOS (but not rev. 1), bit 3 is described as "BASE PLANAR R/W MEMORY EXTENSION 640/X":
View attachment 1309245
As it says right on top, the POST process in rev. 2/3 copies this bit field to@MFG_TST( = 0040:0012, in the BIOS Data Area). When doing so, it does preserve bit 3 (the other "reserved" bits are cleared). But as far as I can tell, this bit is never used or checked again at any point in the BIOS code.
Anyway, note the wording... "640" on the "base planar".
Is this just a badly-worded reference to a 128K expansion board (bringing a 512K mainboard up to 640K), you may ask? Nope - that's not indicated by a switch setting, but somewhere else entirely (CMOS register 33h, bit 7), and that bit *is* checked and used by the POST and BIOS.
What I'm getting at is that our enigmatic "revision 1.5" BIOS here does check for this bit, in a couple of suggestive places. This could neatly explain its left-over presence in the source comments for rev. 2 and 3 - and also tell us a few things about the sort of AT that this BIOS came from (@IBMMuseum may be catching my drift...)