per
Veteran Member
As you might have heard, I have done some investigating around the PC/XT architecture. If you got a PC/XT, you might have noticed some solder pads labbeled "E1" to "E5" spread along the motherboard. those pads are for jumpers that IBM didn't bother to solder on (exept one, on the later 256/640Kb MotherBoards).
Lately, I have been trying to identify the use of therse jumpers. This is how far I have gotten:
E1 (2*1-pin header) is just a waste. Nobody would like to disable the BIOS ROM.
E2 (2*2-pin header) is nice, if you want to make use of different memory-bank sizes from time to other
E3 (2 2*2-pin headers) is for adress decoding, either by the adress decode ROM (custom Bank sizes), or by direct adress lines (16Kb per bank, all 4 banks have to be used)
E4 (2*2-pin header) is for multiplexing for either 64Kbit per chip or for 16Kbit per chip.
E5 (3*1-pin header) is for direct CPU control of the keyboard data line (!!!). Make sure to turn the shift register OFF and keep the keyboard safe and disconected. You should see the TechRef about how to wire your device to the keyboard plug.
Lately, I have been trying to identify the use of therse jumpers. This is how far I have gotten:
Code:
(I would like to see a better scan of the IBM PC/XT TechRef Manual)
E1 = BIOS ROM
---------------------------------
1-2 = Disable
*Off = Enable
E2 = Page select of adress decoding ROM
---------------------------------
1-2 & 3-4 = Page 1
3-4 = Page 2
*1-2 = Page 3 (256/640Kb MotherBoard)
*Off = Page 4 (64/256Kb MotherBoard)
E3 = Bank select
---------------------------------
*1-2 = Adress Decode ROM (>=64Kb between each bank)
3-4 = XA15 (16Kb between each bank)
5-6 = XA14 (16Kb between each bank)
*7-8 = Adress Decode ROM (>=64Kb between each bank)
E4 = Adress multiplexing
---------------------------------
*1-3 = For 64Kbit per 4164 DRAM
2-4 = For 16Kbit per 4164 DRAM
E5 = Software control of Keyboard data line (bit 2 of I/O port 0x61h)
---------------------------------
1-2 = Enable
*2-3 = Dissable
E1 (2*1-pin header) is just a waste. Nobody would like to disable the BIOS ROM.
E2 (2*2-pin header) is nice, if you want to make use of different memory-bank sizes from time to other
E3 (2 2*2-pin headers) is for adress decoding, either by the adress decode ROM (custom Bank sizes), or by direct adress lines (16Kb per bank, all 4 banks have to be used)
E4 (2*2-pin header) is for multiplexing for either 64Kbit per chip or for 16Kbit per chip.
E5 (3*1-pin header) is for direct CPU control of the keyboard data line (!!!). Make sure to turn the shift register OFF and keep the keyboard safe and disconected. You should see the TechRef about how to wire your device to the keyboard plug.
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