Low Level Disk Format on "IBM"-PCs or are modern PCs capable of reading SD-floppys?

[cerker]

Low Level Disk Format on "IBM"-PCs or are modern PCs capable of reading SD-floppys?

Hello,

thats my first post after I found that forum with it's vast amount of information. There are loads of categories, I hope I found the right one (the <=286 and >=386 PC forums seemed to specific to me) .. else mods should feel free to move my post.

In the 80s my father build a computer system based on the "elektor computer", which is formally a 6502 system. The hardware is finished and quite impressive for a homebrew system, but it lacks of software and documentation .. so I took it into care.

One thing is that I would like to make it capable to write and read FAT12-formatted floppies. Unfortunately, because of the system clock of only 1 MHz, it only supports single density (not enough data rate for double density). Now to my question: Does todays FDCs still support SD and which Lowlevel-Format (Syncheaders, Gaps, Marks .. and so on) and which geometry is used. There IS some standard called ECMA-66 for 5.25" SD Disks, but according to my research even back then nobody really used that standard. I would maybe also add an 3.5" drive, so I would need information for that type of drive, too.

The organisation of the FAT and so one is absolutely clear to me.

If you are interested, I would post some information about this system in exchange for your nice help. You can look at a few pictures till then, if you want to:

https://picasaweb.google.com/106424078464300028239/6809?authkey=Gv1sRgCNmM6cvfx67EhAE

Thanks,
Christian

 

[krebizfan]

Nice looking system. Some FDCs do support SD floppy disks; see http://www.classiccmp.org/dunfield/img/index.htm for a table of support and software to test the systems you have access to.

Configuring software that will handle your disks might take some work. Hopefully, one of the floppy disk specialists will be along soon to provide more help.

 

[smp]

Hello, Christian!

Welcome to the VC Forums!

I apologize to begin, because I cannot answer your specific question.

However, I would like to say WOW, that is a beautiful machine and setup that you have! Your father should be congratulated for all his effort to construct such a beautiful functioning home-brew computer system. Is the Elektor computer the same as one of the ones referred to by Wikipedia here: http://en.wikipedia.org/wiki/Elektor ? Is the operating system Linux, or some variant of CP/M or DOS?

That is a wonderful setup you have there. I wish you good luck and I am very glad that you are working to preserve it!

smp

 

[cerker]

However, I would like to say WOW, that is a beautiful machine and setup that you have! Your father should be congratulated for all his effort to construct such a beautiful functioning home-brew computer system. Is the Elektor computer the same as one of the ones referred to by Wikipedia here: http://en.wikipedia.org/wiki/Elektor ?

The "junior computer" was the project before this one (much more popular because you could just build the base board and start computing) .. you find not much about the EC65 on the web, maybe the (dutch) book about it is of some use for you:
http://retro.hansotten.nl/uploads/eljunior/elektuurcomputing/elektuurcomp1.pdf

Is the operating system Linux, or some variant of CP/M or DOS?

The operating system is "FLEX", a relatively simple operating system for up to 4 disk drives. It was quite popular on 6800/6809 systems back then .. I would compare it to CP/M from the functionality. My (big) idea is to write a simple operating system based on FAT12/16/32.

That is a wonderful setup you have there. I wish you good luck and I am very glad that you are working to preserve it!

The first thing is to add IDE support, by this board I designed for it (with CPLD):



I could (and will) simply use CF cards to transfer data, but I think using floppies is a much more realistic feeling.

Greetings,
Christian

 

[Crypticalcode0]

Aren't single density floppy's FM and aren't normal FAT12 floppy's MFM encoded?

Besides if you make use of a DMAC you can do whatever you want without burdening your too much CPU.

 

[Chuck(G)]

I don't really understand what other people are saying, but yes, some modern-ish systems can handle reading or reading and writing FM encoded media.

Format up a 1.44M floppy to boot MS-DOS and add the attached program to the disk. Boot any system you want to test with it and run TESTSD. It'll tell you the FM capabilities of the system.

 

[Crypticalcode0]

Chuck you and me both Single density is relative useless in this modern age and time.

Besides the system he has should be DMA capable, and he could in theory just grab a High Density FDD and just make it run slow enough so the system keeps up.(This is if his father implemented the Address and data buffers)

 

[cerker]

There are adress/data buffers and they have an accessible enable-line which is grounded by a jumper this time ... so maybe DMA should be an option, but I would like to go with single density for the first shot. DMA capability would be an excessive hardware modification of which I'm afraid of.

When I'm back at home, I will check which of (if there are some) my systems support single density. Now I need to know about the low-level format (for SD and DD).

Thanks so far,
Christian

 

[Crypticalcode0]

DMA is not that extensive, all it requires is access to the back plane of the computer.
To which you already need access if you wish to add that CLPD IDE extension your planning.

It really only maters if the memory can take it.
Like you said it's a 1MHz system, this means the minimal access time DRAM allowed is about 240/280ns access time because on 1MHz a cycle is 1µs long.
If your DRAM is faster you should have no trouble adding DMA to your system.

It has been a while since i played around with the 65C02 and Z80A. (Still have some of them spare and have some 541256 DRAM here somewhere i could build a test system in less then a week if required)

 

[cerker]

Ok, I will check if DMA is possible without too much risk to break everything .. but from a first look it's a additional card with the DMA controller and some wiring on CPU and floppy-controller card.

 

[pearce_jj]

Have to say I've never seen a hexadecimal numeric keypad before

The first thing is to add IDE support, by this board I designed for it (with CPLD)

I'm very interested in this; are you making your CPLD sources available?

 

[barythrin]

This is an ignorant statement but does that have anything to do with trick like Commodore putting a 6502 in the floppy drive? If you added a floppy drive controller with it's own processor would it be able to do the math quick enough for your system?

 

[cerker]

Have to say I've never seen a hexadecimal numeric keypad before

This is VERY convienient to type in programs as hexdumps.

I'm very interested in this; are you making your CPLD sources available?

I see no problem in doing that, but I have to debug and optimize them first .. also they are a little bit specific to this system. But I will write documentation to this system in general .. but this will take a few months (or years).

This is an ignorant statement but does that have anything to do with trick like Commodore putting a 6502 in the floppy drive? If you added a floppy drive controller with it's own processor would it be able to do the math quick enough for your system?

Floppy controller chip is an WD2797 which does all the modulation/demodulation/syncronisation stuff, the problem is just data rate.. reading the status register for the data-request bit, checking, writing data, checking the busy-flag just takes to long for double density. Thats why DMA coupled to the hardware-DRQ line of the WD2797 was suggested here before.

We would rise the system clock as CPU is an 63C09 .. (yes, the nice hitachi one with "some" additional features) .. which is capable of 3.5 MHz but some other components of the system wouldn't like that, the monitor roms are 450ns 2732, but it would be easy to replace them by e.G. 120ns 27C64. Main concern is the EF9367 graphics chip which requires an "ENABLE" period of at least 450ns.

 

[Crypticalcode0]

Hm, if you don't like to add a DMA how about decoupling the floppy subsystem like commodore did.

No you really do require a DMAC if you intend to add IDE to the system.
PIO on 1MHz is dead slow.

My main concern is the Memory chips if they can handle the extra cycles and if all it requires is to switch a jumper on the CPU board that should not flat out kill the system.
However this should not cause a short circuit because that could ruin the system.
your dad deviated from the main design because as i see it uses a PIA and a ACIA chip in the schematics posted in this thread.
So yeah modification to the FDC board is a little more extensive.

So what speed grade is the memory?
280ns 240ns 120ns? it should be the 4164- (Wait didn't these cost a small fortune in the 80's?)

 

[pearce_jj]

I see no problem in doing that, but I have to debug and optimize them first .. also they are a little bit specific to this system.

Well in case it helps, if you plan to use ONLY compact flash then the BIOS for it can switch the media to 8-bit mode before it does anything else then everything becomes pretty easy, just pass through the address lines to DA[0..2] and CS[0..1] and a single 8-bit data channel.

However if the intention is to support spinning disks other than microdrives, 8-bit transfers aren't supported except for ATA-2 drives so a latch will be needed to convert between 8 and 16-bit per the infamous XT/IDE project by Andrew Lynch. With the CPLD implementation it seems that it's very difficult to get the timing right for this, in terms of storing the high byte in the latch, I guess because the read hold time is so short (5ns IIRC). One CPLD adapter has been abandoned because of that already.

 

[Chuck(G)]

Back to floppies. You can do 250kbit/sec MFM ("360K" or "720K") with a 1MHz 6502, but forget about high-density MFM. Maybe that will be enough? A WD2797 has support for MFM built-in.

Another option is SDCard using SPI (serial peripheral interface; basically an 8 bit shift register) if you're on the cheap. A simple 3-wire interface.

 

[cerker]

No you really do require a DMAC if you intend to add IDE to the system.
PIO on 1MHz is dead slow.

I was planning to just accept that inconvinience .

Your dad deviated from the main design because as i see it uses a PIA and a ACIA chip in the schematics posted in this thread.
So yeah modification to the FDC board is a little more extensive.

The design mentioned in the book (it only posted it for reference) was later superceded by the "UDC"-Card (Universal Disc Controller) which uses the WD2797 and also incorporates a (VERY, only a few latches .. you have to do the full protocol in SW) simple SASI-Interface, which was capable to use industry-standard floppies, the first design wasn't compatible at all.

So what speed grade is the memory?
280ns 240ns 120ns? it should be the 4164- (Wait didn't these cost a small fortune in the 80's?)

I have found an old DRAM-card, but it was replaced by the newer SRAM-card which carries 6 HM3-2064-5 SRAMs by now. I didn't find anything about the "-5" speed rating for this chip, but they are plugin compatible with 6264 which are still in production with 55ns access time for very reasonable price. So that should be no problem.

Well in case it helps, if you plan to use ONLY compact flash then the BIOS for it can switch the media to 8-bit mode before it does anything else then everything becomes pretty easy, just pass through the address lines to DA[0..2] and CS[0..1] and a single 8-bit data channel.

However if the intention is to support spinning disks other than microdrives, 8-bit transfers aren't supported except for ATA-2 drives so a latch will be needed to convert between 8 and 16-bit per the infamous XT/IDE project by Andrew Lynch. With the CPLD implementation it seems that it's very difficult to get the timing right for this, in terms of storing the high byte in the latch, I guess because the read hold time is so short (5ns IIRC). One CPLD adapter has been abandoned because of that already.

I've tried the 8bit way before, but the CF card I used refused to go into 8bit mode .. I know that supporting 8bit is actually mandatory according to ATA-spec for CF-devices, but some manufacturers doesn't seem to care about that. I could have decieded now to check loads of cards to find one thats working, but I don't like that. So I decided to make a 16bit Interface which fully mets the ATA-specs (without DMA at first). I'm aware of the timing-problems, that's why I have included the 25 MHz oscillator. I want to elongate the -IORD pulse by 40-80ns, so that I can safely latch the other byte on the falling edge of E. Now I have to see if that works like designed .

Back to floppies. You can do 250kbit/sec MFM ("360K" or "720K") with a 1MHz 6502

Unfortunately the 6809 is just enough less cycle efficient to screw that up .. checking for DRQ and transferring the byte to bus takes 34 cycles but only 32 would be allowed. The reason are mainly this (normally very convinient) 16bit pointers which need more address calculating cycles. In native mode of 6309 that should break down to 28 cycles, but my tries weren't working till now..

 

[pearce_jj]

I've tried the 8bit way before, but the CF card I used refused to go into 8bit mode .. I know that supporting 8bit is actually mandatory according to ATA-spec for CF-devices, but some manufacturers doesn't seem to care about that.

That's odd; I'm yet to find a CF card that doesn't support it, but there we are!

 

[Crypticalcode0]

The simplest form of a DMA I can think of uses 2 buffer 74LS245, a 4bit counter, a 8bit D-Latch (74LS374 if you can find them), and a 74181 or other ALU.
You would need some 74LS32 and perhaps a 74LS06 to glue and you might require a ROM or a latch to Control all of the above.

 

[cerker]

That's odd; I'm yet to find a CF card that doesn't support it, but there we are!

It gave the status "ABRT" to me with "unsupported feature" ..

No you really do require a DMAC if you intend to add IDE to the system.
PIO on 1MHz is dead slow.

As an addition to DMA for IDE .. as this system uses the Hitachi 6309, there is the "TFM" instruction which is a hardware blockmove. It can transfer up to 64KB from one memory location to another, with the option of autoincrement for source and/or destination (independent). It needs 6cycles for initialization and 3cycles for every byte.

You cant use it for FDCs as there is no way to synchronise it externally, but for IDE, especially todays devices with MBs of internal memory which are able to buffer the 48KB which would fit into main memory without any problem, it should be a good way to go. A data rate of 333 kilobytes per second doesn't sound that slow to me for a system like that.

To all: My old PC DOES support Single Density according to sdtest.exe .. My newer one is a piece of crap on floppy disks, the cheap disk drive ALWAYS gets a disaligned head after 3 or 4 disks (can only read disks it formatted itselfs and destroys other disks if you write on them), and the controller is stripped down to just one drive (where is the point of this? saving 2 FFs on the multi-IO chip for the select lines? Are you serious?)