The remaining address lines A7-A15 were all measured to be xxx KHZ
David Multimer replies:
The signals on the address lines are perfectly normal.
When a Z80 is hard wired for NOP's the refresh address (A0-A6) will always be the same as the low 7 bits of the instruction fetch address.
So, what you see on A0-A6 is double the duration of the instruction fetch. A7-A15 will go low each and every refresh cycle.
So, the effect of it all is A0-A6 will have a square wave with a 50/50 duty cycle. A0 will have a pulse length that is double the clock, A1 4 times the clock etc.
However, A7-A15 do not follow that pattern because the refresh address counter is only 7 bits.
A7-A15 exhibit a long low which follows the doubling pattern but the high part of the cycle has a series on lows in
it (refresh) that are half the duration of the lows on A0.
Long story short, because of the lows introduced by the refresh cycle (one per instruction fetch) A7-A15 will all read
about double the frequency of A0 which is not changing state during the refresh cycle.